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Measuring Operating Point Parameters in Stacked-FET Devices

Conorp

Version: ICADVM18.1-64b.500.8, cadence_icadv 18.10.080, cadence_spectre 19.10.237

I followed the instructions for measuring operating point parameters for stacked devices at these two links:

https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O0V000009ESG5UAO&pageName=ArticleContent

https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O0V000006D7zDUAS&pageName=ArticleContent&oMenu=People%20who%20viewed%20this%20also%20viewed

The results returned for the operating point parameters do not seem to be correct or I've misunderstood how to use this feature. I am trying to measure vds and vdsat for my stacked device over a DC sweep of the drain voltage with the source grounded.

I have the following in my Save Options:

I then added the following expressions to my output in ADE Explorer:

I plotted these, along with I_DS for the stacked device. Vdsat seems reasonable and does seem to indicate when the device enters saturation. I have also included the vdsat of each individual device in the stack after descending into it. However, I would have expected the vds op point to match the voltage I am applying at the drain (the source is grounded) but vds appears to remain constant at -800mV which cannot be correct. 

So my main question is how are these operating point parameters constructed for a stacked device?

  • For example, each individual device in the stack has a different Vdsat, how is the Vdsat for the stacked device constructed?
  • In the case of vds, I would have assumed simply that the vds of each device in the stack would be added to produce a stacked operating point parameter. So maybe stacked operating points aren't always available?

I suppose at the end of the day, I would like to be able to tell if my stacked device is in saturation or not but I'm not completely sure how to do that.

Hopefully that's all clear and thank you!

Parents
  • Conorp

    To follow up here, I measured the op point "id" and then the node current in the drain. They do not match at all, however the op point "ig" matches the measured node current in the drain...something fishy going on here. Is this a Cadence problem or should I talk to the foundry?

  • ShawnLogan
    in reply to Conorp

    Dear Conorp,

    Thank you for the added information! I did read your initial post and started to respond, but never finished.

    One thought I had, just to provide a third piece of data, was to construct your stacked device as a set of discrete devices. In essence, unpack the devices in the parametized stacked MOS cell into a set of 4 discrete MOS devices with the same sizes and topology as those in your stacked parametized instance. If you include this set of discrete devices in the same test bench as your original parametized stack device and provide it with the same external voltages, it may provide some added insight into how consistent the DC operating point information of the parametized cell is with its discrete counterpart.

    Perhaps you have already tried this - and I apologize if you have! To be honest, I would also include a set of 2 and 3 discrete devices as two additional data points to see how the vdsat of the individual devices changes with stack size.

    Let me know your thoughts about this possible study if you like...

    Shawn

  • Andrew Beckett
    in reply to ShawnLogan

    Conor,

    I've not looked into any of the options suggested in those articles myself; I would suggest you contact customer support.

    Andrew.

Reply
  • Andrew Beckett
    in reply to ShawnLogan

    Conor,

    I've not looked into any of the options suggested in those articles myself; I would suggest you contact customer support.

    Andrew.

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