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Simulation Determinism

TempViator

Hi,

I have an AMS/Spectre simulation that I have run twice, by starting them 45 seconds apart in time, on the same multi-core machine in a simulation farm of machines, using the same number of cores. This simulation has both Verilog AMS elements and analog transistor circuits. This is a full chip sim, so the sim time may be ~24hours. The time to simulate is diverging, though. At a comparable point in the sims, one too 3.5hrs to get there, the other took 7+ hours.

Is there anything that is not deterministic in the sims themselves, like intentional randomness added to time step algorithms, even running the same netlist, same options, same parameters, same number of cores on the same machine?  Or must this all be machine, networking, core priority, etc. differences?

Thanks!

  • Andrew Beckett

    It should be deterministic, and assuming the machine has enough capacity to run both jobs, I would not expect  this.  I suggest you contact customer support at http://support.cadence.com

    Andrew

  • TempViator
    in reply to Andrew Beckett

    Thanks for the fast reply!  I will contact them.

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