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Moving average offset in verilogA

jorgevdelacruzN

Hi,

I'm using the "11277434" solution to implement a moving average function on verilogA but the problem is that I'm always getting a different offset on the simulations. Is there any way to cancel this offset? I saw that in the new version of the function for the viva calculator this problem, with the offset, was solved. Unfortunately, I can't migrate the skill code into verilogA. Do you have any suggestions to avoid the offset issue in the verilogA code?

verilogA Code:

parameter    real    gain=1.0;
parameter    real    time_window= 1u from (0:inf);

real x, k1;

analog begin

    @(initial_step) k1 = gain/time_window;

    x    =    k1*(V(in)- absdelay(V(in),time_window));
    V(out) <+  idt(x,0.0);
end
endmodule

Parents

  • The article Moving Average Function in OCEAN/calculator went through quite a bit of refinement to improve it with respect to getting the DC level correct (took a few attempts for me to get it right). I've never had the opportunity to try to do the same with the Verilog-A (it's quite hard because it uses a piecewise strategy of combining the results together in the calculator function to ensure that the startup behaviour doesn't break anything).

    Unfortunately it's unlikely I'd have time to revisit the moving average Verilog-A to see if this can be addressed soon (the Verilog-A article was written by another colleague many years ago). This is one of those things you just need to sit in a quiet room and think carefully about - quiet rooms are in short supply at the moment!

    Andrew

Reply

  • The article Moving Average Function in OCEAN/calculator went through quite a bit of refinement to improve it with respect to getting the DC level correct (took a few attempts for me to get it right). I've never had the opportunity to try to do the same with the Verilog-A (it's quite hard because it uses a piecewise strategy of combining the results together in the calculator function to ensure that the startup behaviour doesn't break anything).

    Unfortunately it's unlikely I'd have time to revisit the moving average Verilog-A to see if this can be addressed soon (the Verilog-A article was written by another colleague many years ago). This is one of those things you just need to sit in a quiet room and think carefully about - quiet rooms are in short supply at the moment!

    Andrew

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