Simulate accumulted jitter spectral density vs. unit jitter spectral density in a ring VCO

Dear threepwood6,

threepwood06 said:

I wan't to simulate the phase noise of a VCO, but I'm not sure of what I'm simulating. And actually the three setups (Edge Crossing, Edge Delay and Sampled Phase give me exactly the same results)
To illustrate what I would like to do, please have a look at the following schematics:

I must admit I am confused by your statement that suggests you want to simulate the phase noise of a VCO and what you indicate you are trying to measure:

threepwood06 said:

1) the phase noise (only PM) between rising edge of phi3 and rising edge of phi2 (unit cell phase noise) at a given threshold. Actually exactly as if I opened my VCO and attacked phi2 with an external pulse source.
2) the cumultaed phase noise (only PM) between noisy phi1 and noiseless (ideal clock) nl_phi1 at a given threshold.

In (1), your description does not appear to be the VCO phase noise. It is the relative noise between the output of one stage and its input. Is this really what you want? The VCO phase noise can be estimated by performing a pss analysis followed by a pnoise analysis of, for example, output phi1 or phi3 or phii2. There will be a difference in the their loading (which you might consider trying to make identical), which will impact the output phase noise a bit, but either should provide similar results. If you specified the pnoise measurement output nodes of phi3 relative to phi2, your measurement is more of a relative phase noise measurement where your reference node is a noisy reference.

In (2), there is no need to include your "noiseless" VCO in your simulation to assess the phase noise of node phi1. Basically, perform a pss analysis followed by a pnoise simulation where the output nodes are defined to be phi1 and, I assume, ground.

Without indicating your exact simulation settings, I can't really comment to a great extent on your statement:

threepwood06 said:

And actually the three setups (Edge Crossing, Edge Delay and Sampled Phase give me exactly the same results)

However, I can state the results for a time-averaged and sampled phase based analysis for an autonomous circuit (i.e. oscillator) are expected to be the same as specifically noted in the Cadence On-line support article at URL:

support.cadence.com/.../ArticleAttachmentPortal

where it states:

"You will only get similar results between sampled(jitter) edge phase noise and timeaverage phase noise if you are simulating an oscillator."

The results can be different for a driven circuit as shown in the example in the aforementioned URL.

Sorry I cannot provide any other specific thought...

Shawn

Thanks a lot for your attempt to answer Shawn; as a matter of fact, maybe I have been really clear and sorry for this; Firstly please appologize my confusing english as it is a second language for me:
I have illustrated a "noiseless" ring oscillator just to illustrate what I would like to do precisely.

I need for a circuit to construct a small signal AC noise model of a ring oscillator, from which I use each phases individually to sample datas. Thus I would need to model AND the overall accumulated spectral jitter noise density, let's call it Jacc(f) (or Jacc(z) or Jacc(s) ) in s/sqrtHz AND the related noise of one phase to its predecessor in the ring chain. Let's say each buffer generates it's own spectral jitter density Ju(f) in s/sqrtHz.

For this purpose, I'm trying to link
1) a mathematical model
to
2) an small signal AC noise model
to
3) a transient noise simulation.

For the test, I've created a Verilog-A model to emulate the behaviour of a N-buffers ring oscillator, in which each ideal buffer generates a constant delay Tu (unit delay in sec) + his own spectral jitter density (for the test it is white and limited to fVCO/2), we'll call it Ju(f) (in s/sqrtHz vs. f). Note the oscillation frequency would thus "ideally" be 1/(2*N*Tu).
I've run the closed ring oscillator transient noise simulation for ages and observed the cumuled jitter with a DFT. The result is a Jitter in a shape of K/f function (V/sqrtHz) (!warning! not a flicker "1/f" noise, but a "-20dB/dec" shape).
I'm struggling to:
1) find a mathematical relationship between Ju(f) and Jacc(f)
2) link it to the transient noise simulation spectrums: I've taken the cumulted jitter spectrum, multiplied it by f to get flat noise similar to Ju(f), and estimated the ratio between it and the flat spectrum of an individual inverter to get the constant "K".
3) figure out what I actually simulate when I lunch a pnoise (sampled phase) simulation (on my real ring VCO circuit): is it the accumulated jitter/phase noise or the edge-to-edge jitter (from one phase to the other - or from a phase to itself previously)? And how can I isolate the Ju(f) (without accumulation) with the overall accumulated jitter?

As a bonus, here is my mathematical reasoning to try to answer point 1, maybe you could help as well:
If Ju(f) is the spectral jitter density in s/sqrtHz, and Jacc(f) the whole ring oscillator cumulated jitter, I write out:
Jacc²[n] = Jacc²[n-1] + Ju²[n] , the delay between [n] and [n-1] being one Tu delay of an individual buffer.
Indeed, I assume each inverter adds its jitter to the previous one in powers of jitter.
Thus, if I re-write in z domain (z^-1 being one inverter delay):
Jacc²(z) = Jacc²(z).z^-1 + Ju²(z) => Jacc²(z) = Ju²(z) / (1-z^-1) => Jacc²(f) ≈ Ju²(f) / 2pi*Tu*f
Unfortunally it does not match with the -20dB/dec behaviour I see in transient noise simulation as I should see ../..f² instead of f in the above formula...

You can see I'm somewhat confused :-)

Dear threepwood06,

Thank you for taking the time to include a bit more information on both your objective and simulations. It is helpful in trying to respond to your basic questions. I will provide a few notes to start on your responses...

threepwood06 said:

I need for a circuit to construct a small signal AC noise model of a ring oscillator, from which I use each phases individually to sample datas.

I do not believe your use of a small signal AC model is accurate for your end goal.

a. The small-signal AC responses provide the small-signal noise based on the DC operating point of your circuit. In the case of an N-stage ring oscillator, there is nothing in your circuit schematic to keep the individual inverters in their linear region of operation. Depending on your simulation conditions, some stages may be saturated with outputs at the supply or ground or any voltage in-between.

b. Even if you can overcome item (a), the AC small-signal analysis totally ignores the non-linear nature of each inverter stage and will not include the impact of any noise folding. Hence, trying to compare its results in anyway to a large signal noise response is not valid.

threepwood06 said:

I need for a circuit to construct a small signal AC noise model of a ring oscillator, from which I use each phases individually to sample datas. Thus I would need to model AND the overall accumulated spectral jitter noise density, let's call it Jacc(f) (or Jacc(z) or Jacc(s) ) in s/sqrtHz AND the related noise of one phase to its predecessor in the ring chai

I hate to disagree again, but the phase noise of each stage of the ring is independent. Therefore, I believe computing the noise of any one output relative to the noise of the prior inverter output as a means of estimating the relative noise on a given sampling clock phase is also not valid. Also the measure of jitter, which it appears you are trying to determine, is not expressed in s/sqrtHz - but only time or unit intervals. Jitter is computed by integrating a spectral noise density (such as phase noise in dBc/Hz). When one integrates such curves over some frequency range, the units are either in a time unit or, perhaps, unit intervals (unitless, but can be converted to time units using period of signal whose spectral density is under study).

threepwood06 said:

I've run the closed ring oscillator transient noise simulation for ages and observed the cumuled jitter with a DFT. The result is a Jitter in a shape of K/f function (V/sqrtHz) (!warning! not a flicker "1/f" noise, but a "-20dB/dec" shape).

Please check your units - if your noise source is white - your spectral density plot will have a 1/f^2 relationship to frequency. The "jitter" is dependent on your integration frequency limits and will be in seconds or unit intervals - not "K/f". The transient noise simulation accuracy and its DFT are highly dependent on your choice of noisefmax and your sample times of the your transient simulation (which is directly related to the number of points you choose for your DFT - not to mention your choice of windows). All of these will very significantly impact your accuracy and hence must be experimented with prior to "trusting" your estimates of phase noise and jitter from a transient noise simulation.

Each of the questions and comments you have posted are topics that involve much more discussion than I can provide now. I might, however, refer you to an IEEE JSSC classic paper on the noise of ring oscillator based VCO entitled "Phase Noise and Jitter in CMOS Ring Oscillators" by Asad A. Abidi. I might suggest you review this and re-examine some of your proposed methodologies to determine the jitter of the multi-phase clocks from your ring VCO.

Shawn