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  3. Parameterizable Voltage Controlled Oscillator Model

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Parameterizable Voltage Controlled Oscillator Model

janisw
janisw over 4 years ago

Dear Community,

I want to simulate an analog, custom PLL circuit (trans, ac, hb using ADE XL). For this I need to implement a behavioral VCO model, easy task in ADS so Cadence should of course offer a block for it, too. Believe it or not, I don´t manage to find anything...
In Cadence all I find is

  • vsin (analogLib) -> no tuning voltage input
  • vsource (analogLib) -> same
  • osc (rfLib) -> same
  • vco_tuning_curve (pllLib) -> no analog signal output, output voltage just represents the frequency in MHz

All are not suitable, as I need "just a simple VCO block": I want to insert a voltage signal and generate an according output signal, using parameters like free running freq (f_LO), and a linear coefficient (KVCO). Is there something I have overseen?

If not: Right now I am at the point that I might need to use the osc (rfLib) block and try to convert the actual voltage value of Vtune into a parameter which I then put into the output frequency property of the osc.

-> next problem arises:

How can I use a voltage value from the simulation and render it usable in the output frequency expression?

I appreciate any help.

Best regards,

Janis

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  • ShawnLogan
    ShawnLogan over 4 years ago

    Dear Janis,

    > For this I need to implement a behavioral

    > VCO model,

    In this forum, this question has arisen in the past.  One of the main recommendations I've suggested is the veriloga VCO model Ken Kundert created for a VCO in his paper at URL:

    https://kenkundert.com/docs/aacd97.pdf

    The VCO model, with potentially added jitter, is shown in Its Listing 4 on page 11.

    Let me know if I did not understood your need correctly Janis!

    Shawn

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  • janisw
    janisw over 4 years ago in reply to ShawnLogan

    Hi Shawn,

    thanks for your answer! Wow, didn´t think that I need to go into veriloga, but well if it works then fine. I´ll test it on monday and post if I was successfull. First glimpse is that the model in the paper is what I need.

    Thanks again and have a good weekend!
    Janis

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  • ShawnLogan
    ShawnLogan over 4 years ago in reply to janisw

    Dear Janis,

    Thank you letting us know and I hope it provides a model that will meet your needs in your simulation! 

    Enjoy the long weekend too (if you are in USA)!

    Shawn

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  • janisw
    janisw over 3 years ago in reply to ShawnLogan

    Hi Shawn,

    hope you enjoyed the long weekend! I´m not in the US, im in Germany, but thanks anyways.

    So, regarding the VCO:
    Almost a success, the veriloga model from Ken is working and I can control it as I intend with a tuning voltage. However, it is a clock oscillator, the output not sine shaped.. so I´ll need to do some adaptions in the veriloga code, hope I will manage without unsteady phase jumps.
    If i´m lucky it can be done with placing a sin() expression somewhere, I´ll see. But again, I must postpone it to the next days, will keep you updated about the results!

    Janis


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  • ShawnLogan
    ShawnLogan over 3 years ago in reply to janisw

    Dear Janis,

    janisw said:
    If i´m lucky it can be done with placing a sin() expression somewhere, I´ll see.

    I took some time to modify the veriloga model by Ken Kendurt to allow for a sinusoidal output. I then compared the time-interval error of the sinusoidal and square wave outputs of the VCO model. I've placed a short note detailing my effort and results at URL:

    ent.box.com/.../5pag7ol34nwwjuxs7rhlsny6kubj7x24

    and hope this clarifies a change you might consider to create a sinusoidal output. Let me know if you happen to be interested and have any issues with viewing the file at the link I provided Janis.

    Shawn

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