Hi,We have a fairly large mixed-signal block, where we would like to get some transient simulation data with noise. However, to save simulation time, we would like to run up to steady-state first, without noise, and then add noise and simulate for some more time.I did run a transient simulation with a save snapshot after steady state - however when I try to restart, it fails with a SimError (and seemingly nothing in the logs?) - I probably messed something up, allthough I am not entirely sure on what. I have two questions:A) Is this snapshot saved somewhere, so I can try and save it for future use? B) Is this method at all possible? Before I try and redo the transient steady state simulation (7 days of sim time) I would like to know if this is the most effiecient approach?BR, ChristianVirtuoso IC6.1.8-64b.500.20Spectre 22.214.171.1248.isr9Xrun 20.09-s008
> However, to save simulation time,> we would like to run up to steady-state first,> without noise, and then add noise and simulate> for some more time.
Even if this were possible…
Even if this were possible, I am concerned this will save any appreciable simulation time. Basically, whenever you introduce a new set of accuracy requirements to a simulator, it will appear as some form of impulse and will result in a transient subject to the time constants of your netlist - which are appreciable I assume from your post. Although the magnitude of the induced transient may be less than your start-up transient, it will extend the simulation as your solution now must approach steady-state behavior a second time.
> A) Is this snapshot saved somewhere,> so I can try and save it for future use?
I apologize, but it is not clear to me what you did to "save a snapshot" and whether you are trying to restore the circuit state for a transient noise simulation or conventional simulation. I have a lot of experience with saving checkpoint files and restarting simulations and have used the feature numerous times successfully. Can you provide a bit more information on what exactly you tried to do to save the state and restart the simulator using the saved state? And yes, the circuit state is saved in a file in the netlist directory. There is a default filename or you can choose your own filename. There is a pretty good RAK on the Cadence on-line support site at URL:
and a more theoretical document on transient noise simulations at URL:
I also have a tutorial on the methodology if those documents are not sufficient for you.
> B) Is this method at all possible?> Before I try and redo the transient steady state> simulation (7 days of sim time) I would like to> know if this is the most effiecient approach?
I provided some thoughts on this in my earlier comment, but without knowing your actual end objective, my first thought is you may be better off from a simulation time perspective to run a conventional transient analysis or run a transient noise analysis for the entire simulation. I also do not believe you can use the saved state from a conventional transient analysis to restart a transient noise analysis - or at least have not heard that capability exists. They are two different types of simulations with their own simulation methodologies.
However, you could use a set of node voltages obtained from a time point from one type as the set of initial conditions for the other type. With a little more information on your true end objective for the simulation effort, perhaps I might be able to provide some other or more relevant suggestions Christian.
Hi Shawn,Thank you very much for your elaborate answer. It sounds like my approach was way off. We have a DC/DC converter, where the output capacitors have internal leakage. As these need to settle in power, the start up can - unfortunately - not be solved with dc node voltages alone. At least not to our investigations? However, I haven't heard about the node voltages from a previous simulation - can you ensure this is from a specific point in time? and how? I did some back of the napkin math, that showed a simulation with transient to settle was 7 days, and then the noise simulation was another 7 days. But the noise simulation alone approached 55 days of simulation time. So it is not feasable to do a full transient noise simulations. I would highly appreciate if you have some suggestion to how to go about it. I will look into the sources you have send me, and see if I can figure something.Again, thank you for your answer, highly appreciated. BR,Christian
I am just happy to read you found my comments somewhat useful!
In response to a few of your added questions.
jehh said:However, I haven't heard about the node voltages from a previous simulation - can you ensure this is from a specific
The infotimes and infonames parameters may be specified when running a transient simulation to save the operating point information to a file(s) at a specific time(s) of the simulation for use as arguments to the transient simulation readic or readns (initial condition or nodes, respectively) commands in a future simulation. Specifically, in your case, you would want to use the readic command to enforce the node voltages at the initial DC point of your future transient simulation are those from the readic file you saved and then specified in the future simulation.
The methodology is described in the Cadence On-line support article at URL:
The article shows the required syntax from the spectre command line, but the options are included in the Transient Analysis GUI "Outputs" tab found after clicking its "Options" radio button.
jehh said:I did some back of the napkin math, that showed a simulation with transient to settle was 7 days, and then the noise simulation was another 7 days. But the noise simulation alone approached 55 days of simulation time. So it is not feasable to do a full transient noise simulations. I would highly appreciate if you have some suggestion to how to go about it. I will look into the sources you have send me, and see if I can figure something.
What type of noise sources and circuit responses are you interested in understanding through simulation - random or deterministic? How periodic is your DC-DC output? If your interest lies in the impact of device noise sources on the output noise for a periodic waveform, have you considered running a set of pss/pnoise simulations? This performs a pss transient simulation where you can optionally set a transient settling interval ("tstab"). When the time of the simulation reaches "stab", spectre will attempt to find a periodic solution close to the value of the fundamental frequency which you can optionally provide. Once it does converge meet the criteria it has for a periodic steady-state solution, it will perform a large-signal noise analysis using the known device noise sources and determine their contribution(s) to the output phase noise and compute the phase noise as a function of offset frequency from the harmonic you specify (normally 1 to use the fundamental frequency). There is a wealth of information on this type of simulation, including the mechanics as well as various technical tips, on the Cadence On-line support portal.
If your interest, however, is exclusively in deterministic noise (such as power supply induced noise), then perhaps you can explore using a set of conventional transient analysis where you excite, for example, the supply voltage with various sinusoidal frequencies (one per simulation), determine the output noise and compute the transfer function as a function of noise frequency. Is this approach feasible for your needs?
There is a rather dated Cadence blog showing the use of the spectre RF pss/pnoise simulation for a DC/DC converter at its On-line support URL:
The ADE GUI panels are not current, but it might provide a little more insight...
jehh said:We have a fairly large mixed-signal block, where we would like to get some transient simulation data with noise. However, to save simulation time, we would like to run up to steady-state first, without noise, and then add noise and simulate for some more time.
This can be done simply by using the dynamic parameters capability on the transient form. Turn on transient noise as normal, and then in the dynamic parameters section choose the parameter isnoisy. Set it to "no" at time zero, and to "yes" at some suitable time after it has reached steady state. Note that if you have some way of detecting that the circuit is in steady state, it is possible to enable this based on an event in the circuit - but let's cross that bridge once you've got the basic idea working (there would need to be either a Verilog-A model detecting the event or a a spectre assert to detect the event if you want to use this approach).
Unlike Shawn's concern, this is likely to help with performance as the noiseless transient will run faster, and introduction of the noise sources are unlikely to create a significant enough disturbance to cause a convergence difficulty at the time they are applied (it's no worse than the random variation that will happen at each time step after that).