Models for components in sample lib

These are ancient, and I'm not sure they're really set up to use with Spectre. I would suggest using the GSCLIB045 (Generic Standard Cell Library) from http://pdk.cadence.com (you might also want the gpdk045 too).

Andrew

Thank you very much for the information Andrew , so the models for the components from GSCLIB are automatically picked up for Spectre simulations or will I have to point to any .scs file under the Setup- > Model library ?

regards

I just quickly checked. The gscllib standard cell library does depend on gpdk045, and if you have that in your cds.lib it will automatically pick up the models for the transistors when you start a new ADE session.

Regards,

Andrew

Thank you for confirming Andrew.

I am trying to get the gpdk045 to work.

In the meantime I also tried the digital gates (not_gate...) from AHDL library.

Are these expected to work fine  ?? Asking as I was not seeing any change in the output voltage level of the gate with change in the input signal logic level.

I checked the verilog code for the not gate and ensured that I am meeting the high and low voltage level threshold requirements

regards

The most likely explanation for this is that you've not adjusted the rather large tdel (delay) or trise/tfall parameters which are very large (2us and 1us for the second two). If your input signal is changing more rapidly than that, you'll not be seeing any output....

Not really sure what is so difficult about getting gpdk045 or gscllib045 to work... that should be straightforward!

Andrew

thank you very much Andrew, the issues was related to the timing parameter of the logic gate.