Stats

  • Locked Locked
  • Replies 1
  • Subscribers 125
  • Views 1817
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

How cadence generate the "IP Design.XML" file?

huhushuai

When i use Medini Analyze software to calculate the chip failure rate, it's support the IP Design.XML file import, IP Design.XML file include the DIE size information.

So, i want to know, how to use Cadence to generate the IP Design.XML file.

Attach is the Medini Analyze use manual introduction.

  • Andrew Beckett

    Please contact customer support. I'm not sure this is a Custom IC Design question anyway - it's more related to Vmanager/Safety Planner products.

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.