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How cadence generate the "IP Design.XML" file?

When i use Medini Analyze software to calculate the chip failure rate, it's support the IP Design.XML file import, IP Design.XML file include the DIE size information.

So, i want to know, how to use Cadence to generate the IP Design.XML file.

Attach is the Medini Analyze use manual introduction.

Andrew Beckett over 3 years ago

Please contact customer support. I'm not sure this is a Custom IC Design question anyway - it's more related to Vmanager/Safety Planner products.
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