Flatten version of a circuit shows different (DC) simulation result

Can you post the input.scs (with netlist if it's not part of the input.scs) please? That way we can see simulation options and so on ?

Andrew

I cannot upload as a file, somehow.
let me know if there is a better way than pasting the code here.

// some comments that shows project name is deleted

simulator lang=spectre
global 0
parameters Cd=175f Vsupply=1.2 Vsub=-1.2 Iin=12.81n N=0.25 PulseOn=0 \
    Cdet=1f ILeakComp=0 IBias=2.4u ICompDACBias=70n IbKrum=8n bit0_Comp=0 \
    bit1_Comp=1 bit2_Comp=1 bit3_Comp=1 Pix_EN=1 V_CompRef=325m \
    V_KrRef=325m Inj_ON=0 V_InjBias=370m
include "$TPS_PDK_SPICE_SPECTRE_DIR/MOS_12Lvt.scs" section=total_typ


// some comments that shows project name is deleted
subckt Current_Source_cell Bulk Drain Gate Source
    M3 (Drain Gate NB Bulk) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=6.08u wtb=0.525u wsa=1.15u wsb=0.765u mul=((1)*(1))
    M2 (NB Gate NA Bulk) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=6.08u wtb=0.525u wsa=1.15u wsb=0.765u mul=((1)*(1))
    M1 (NA Gate Source Bulk) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=6.08u wtb=0.525u wsa=1.15u wsb=0.765u mul=((1)*(1))
ends Current_Source_cell
// End of subcircuit definition.

// some comments that shows project name is deleted
I59 (net1 vssa) isource dc=100n type=dc
I64 (net11 vssa) isource dc=100n type=dc
V19 (PWELL 0) vsource dc=Vsub type=dc
V18 (vssa 0) vsource dc=0 type=dc
V0 (vdda 0) vsource dc=Vsupply type=dc
M147 (net15 net11 vdda vdda) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=10u wtb=10u wsa=10u wsb=10u mul=((1)*(1))
M146 (net14 net11 net15 vdda) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=10u wtb=10u wsa=10u wsb=10u mul=((1)*(1))
M148 (net12 net11 vdda vdda) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=6.08u wtb=0.525u wsa=1.15u wsb=0.765u mul=((1)*(1))
M150 (net11 net11 net13 vdda) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=6.08u wtb=0.525u wsa=1.15u wsb=0.765u mul=((1)*(1))
M149 (net13 net11 net12 vdda) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=6.08u wtb=0.525u wsa=1.15u wsb=0.765u mul=((1)*(1))
M145 (net10 net11 net14 vdda) tpnm133_hs_lvt w=400n l=7.8u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=10u wtb=10u wsa=10u wsb=10u mul=((1)*(1))
I67 (vdda net2 net1 vdda) Current_Source_cell
I66 (vdda net1 net1 vdda) Current_Source_cell
M110 (net2 net2 vssa PWELL) tnnm133_hs_lvt w=400n l=1u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=10u wtb=10u wsa=10u wsb=10u mul=((1)*(1))
M111 (net10 net10 vssa PWELL) tnnm133_hs_lvt w=400n l=1u m=((1)*(1)) \
        ad=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        as=((400n)-(2*5.5n))*((230n)-70n-5.5n) \
        pd=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) \
        ps=((400n)-(2*5.5n))+2*((230n)-70n-5.5n) sa=2u sb=2u ta=320n \
        tb=320n wta=10u wtb=10u wsa=10u wsb=10u mul=((1)*(1))
simulatorOptions options psfversion="1.4.0" reltol=1e-3 vabstol=1e-6 \
    iabstol=1e-12 temp=27 tnom=27 scalem=1.0 scale=1.0 compatible=spice2 \
    gmin=1e-12 rforce=1 maxnotes=5 maxwarns=5 digits=5 cols=80 pivrel=1e-3 \
    sensfile="../psf/sens.output" checklimitdest=psf
dcOp dc write="spectre.dc" maxiters=150 maxsteps=10000 annotate=status
dcOpInfo info what=oppoint where=rawfile
modelParameter info what=models where=rawfile
element info what=inst where=rawfile
outputParameter info what=output where=rawfile
designParamVals info what=parameters where=rawfile
primitives info what=primitives where=rawfile
subckts info what=subckts where=rawfile
saveOptions options save=all currents=all

I suggest you contact customer support. I don't know what technology you're using so I don't have access to the models. I replace the transistor models with very simple bsim4 models and I got essentially an exact match between the two hierarchical implementations, using the same version of Spectre that you were using. Nothing from the drawing of the schematic nor the netlist leads me to think that the results should be different. The compatible=spice2 is a little unusual, but I was using that in my simulation too and can't see why that would alter the behaviour.

Regards,

Andrew

I suggest you contact customer support. I don't know what technology you're using so I don't have access to the models. I replace the transistor models with very simple bsim4 models and I got essentially an exact match between the two hierarchical implementations, using the same version of Spectre that you were using. Nothing from the drawing of the schematic nor the netlist leads me to think that the results should be different. The compatible=spice2 is a little unusual, but I was using that in my simulation too and can't see why that would alter the behaviour.

Regards,

Andrew

Dear delgsy,

1. I am just wondering....as a point of information...if you follow the guidelines provided in the Cadence On-line support article at URL:

https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O0V000009ESG5UAO&pageName=ArticleContent

that details how to annotate effective operating point parameters of the top level of a subcircuit containing stacked devices (as yours does), how do its terminal currents compare to the combined currents of your two instances of the subcircuit? In other words, one would expect from your top level schematic containing the two stacked device subcircuits I67 and I66 and the "flattened" version of the two subcircuits that the sum of the drain and gate currents currents of the two subcircuits and the "flattened" gate currents of M145, M146, M147, M148, M149, combined with the, drain currents of M150 and M145 should equal 200 uA total (the currents of your two ideal current sources). In otherwords, are the combined DC terminal operating currents of the two subcircuits the same as the sum of the individual currents shown when you descend into I67 and I66 the same?

From your snapshots, it is clear the operating currents of the devices shown when you descend into two subcircuits are not the same as the operating currents of the "flattened" version and their total is not exactly 200 uA.

2. Are the results you are displaying in your screenshots simulated with Spectre X, spectre +aps, spectre ++aps or pure spectre? If  you have not experimented with the simulator options, have you simulated the circuit with pure spectre? There are small differences (ideally) between the 4 simulation options with spectre being the most "accurate". I was not sure which simulator you used as some simulator version and options are provided in the "runSImulation" file contained in the netlist directory. Perhaps this was obvious to Andrew - but not to me (nothing new here!).

Just a couple of thoughts I wanted to pass by you in case you are not frustrated enough with your results and attempts to resolve the discrepancies!

Shawn