About VCO design

Dear Ahmad24,

> ...i don't understand how to select Vpwl of VCO

Speaking for myself, I do not understand why you are using a piecewise linear source in a VCO design. is that what "Vpwl"  in your post is an acronym for?

Shawn

Actually Vpwl is the voltage source in cadence. I am designing Current starved VCO where the output of the final stage is connected back to input of 1st stage of delay cell. And Vpwl voltage source is connected between them. I want to ask that how to select parameters of this to to make a waveform that repeats themselve.

Dear Ahmad24,

Ahmad24a said:

I am designing Current starved VCO where the output of the final stage is connected back to input of 1st stage of delay cell. And Vpwl voltage source is connected between them.

Please excuse my continued misunderstanding Ahmad24!

Am I correct in that you are suggesting that you have connected an ideal piecewise linear voltage source between the output of the final stage and the input of the first stage?

If so, and you are expecting that this source alone with some values assigned to its parameters will result in some type of oscillation, I think, perhaps, you may have some misunderstanding regarding the criteria for oscillation in a VCO.

First, it sounds as if you are designing a ring based VCO. Secondly, you have not provided enough information for me to know if it the ring VCO is a single-ended or differential based ring VCO. This is very important to know. Thirdly, is the ring VCO a CML or a CMOS based design? This is also critical to know. The criteria for oscillation is not simply that the "output" of a series of inverter stages be connected to the input of the first stage. The criteria for oscillation  is based on the gain and phase of its open loop response (including the DC operating point at power up and the gain/phase as a function of the "current starving" settings), the propagation delays of each inverter comprising the ring VCO, the number of stages, the technology limits, and the load on the interior and exterior  inverter stages of the VCO, and the details of the feedback path (impedance and any intervening devices).

Although the circuit topology of a VCO design appears very simple in some cases, its operation is a highly non-linear and requires a significant amount of effort and understanding to both design and operate robustly. I can provide some reference material if that would be of any use, but unfortunately from my perspective, the little information your provided in your post does not allow me to provide the kind of compact answer you might like. Sorry!

Shawn