Stats

  • Locked Locked
  • Replies 3
  • Subscribers 125
  • Views 13383
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

DAC Verification (ENOB, SFDR, DNL, INL, THD measure)

Dali Lai

Hi, 

I am trying to characterize my 8 bit R2R DAC, I couldn't find DAC verification document on the Cadence Support, only ADC Verification. 

Some posts suggested using measurement->spectrum, but other posts say it's for ADC.

Also, I don't have ahdlib as some posts suggested to use.

I tried using it and here is my result, based on the THD (0), something doesn't feel right. 

Here I am inputting from 256 to 0 for 2 cycles. 

I am wondering if there is a document I can follow for the DAC verification or am I setting anything wrong?

Any advice is appreciated! Thanks!

Parents
  • ShawnLogan

    Dear Dali Lai,

    Did you happen to review the RAK on ADC characterization? Module 4 starting on page 82 of URL:

    support.cadence.com/.../ArticleAttachmentPortal

    details the characterization of a capacitor DAC. The DAC happens to be used in a successive approximation based ADC, but the methodology appears relevant for any DAC. The section examines the SINAD of the DAC and provides suggested settings and a test bench.

    Is this helpful at all?

    With respect to the screenshots you uploaded in your post, if you are you applying a ramp of your 256 codes with each code step dwelling for the same amount of time, this, in my opinion, is not the type of signal you want to apply to characterize the total harmonic distortion of a DAC. The input signal code words should correspond to either a single tone or the sum of a few tones - not a ramp that contains a far richer set of tonal frequencies. Does this make sense Dali Lai?

    Shawn

  • Dali Lai
    in reply to ShawnLogan

    Yes, that helps a lot! Thanks! I saw the document but didn't realize there is a chapter mentioning DAC.
    So I should be input such as a sine wave for an input signal for characterization? Is there a Verilog file that I can reference for the inputting signal?

    Sorry, I haven't been inputting the signal using Verilog code so far so am not that familiar with it.

Reply
  • Dali Lai
    in reply to ShawnLogan

    Yes, that helps a lot! Thanks! I saw the document but didn't realize there is a chapter mentioning DAC.
    So I should be input such as a sine wave for an input signal for characterization? Is there a Verilog file that I can reference for the inputting signal?

    Sorry, I haven't been inputting the signal using Verilog code so far so am not that familiar with it.

Children
  • Andrew Beckett
    in reply to Dali Lai

    You could use an ideal 8-bit ADC model in ahdlLib (you said in your original post that you don't have it, but that would be extremely unlikely as it has been shipped with the software for the last 25 years or so). You just need to add:

    DEFINE ahdlLib $(inst_root_with:tools/dfII/bin/virtuoso)/tools/dfII/samples/artist/ahdlLib

    to your cds.lib to get it in your list of libraries.

    Andrew

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.