inductor LVS and netlisting

Hi Kevin,

Don't put nlAction=ignore on the instance because that will remove it from all netlisters. Instead just use lvsIgnore=t (a boolean property, with it turned on), or nlIgnore="auCdl". Not sure that either of these approaches are strictly true because it means you're omitting it from the netlist for LVS altogether, and so you're not really comparing it at all.

The precise flow will depend somewhat on how your LVS rules are set up to deal with inductors. You may want to talk to the foundry or customer support to see if we can be a bit more specific about the strategy to take with the particular PDK and LVS tool you're using (of course, whether you contact us or another vendor depends on which LVS tool you're using).

Andrew

Hi Kevin,

Don't put nlAction=ignore on the instance because that will remove it from all netlisters. Instead just use lvsIgnore=t (a boolean property, with it turned on), or nlIgnore="auCdl". Not sure that either of these approaches are strictly true because it means you're omitting it from the netlist for LVS altogether, and so you're not really comparing it at all.

The precise flow will depend somewhat on how your LVS rules are set up to deal with inductors. You may want to talk to the foundry or customer support to see if we can be a bit more specific about the strategy to take with the particular PDK and LVS tool you're using (of course, whether you contact us or another vendor depends on which LVS tool you're using).

Andrew

thanks Andrew, that's very helpful. In fact, there is a specific layout layer that we can cast on the coil so that it'll be blackbox'ed in LVS so that's good.

I noticed that if we add a property of lvsIgnore = t (boolean), from schematic to cdl, the inductor cell will be ignored as well, this is undesired as I'm hoping to be able to still run transient simulations w. the nport model inside the inductor schematic

Is it conflicting wishes? (inductor cell be ignored for LVS, but still show in netlisting for simulation)?

Kevin

Kevin,

This doesn't make sense. If you are setting lvsIgnore=t on an instance, it will only impact the auCdl (and auLvs for Diva) netlister, plus the Assura verification flow. It will not impact other netlisters such as spectre, hspiceD etc. Unless you are misusing a CDL netlist for simulation, it simply does not behave this way (I even just re-checked just to make sure that somebody hadn't changed this, although it would seem unlikely because it's been like this for probably 30 years).

The only thing I can think of is that you are using the CDL netlist for simulation. That is not what it is intended for; it's for physical verification. Is that what you're doing?

Andrew

Andrew you're right. I just double checked spectre netlisting and nport model did get generated with lvsIgnore=t. thanks for correcting that.

From the layout side, is there some setting that will also blackbox the coil and is technology independent? earlier I mentioned a layer can be used but wonder if there is a generic solution?

thanks,

Kevin

Hi Kevin,

I'm not sure you're really talking about "blackboxing" the inductor. Normally if you blackbox something in LVS, then it treats the cell as a fixed instance and only performs LVS to the pins of that cell and doesn't look inside it. It still would expect to match an instance of that cell on the layout with an instance of that cell on a schematic though. If you omit it on the schematic side, then the connections would be open - but connected on the layout side. 

So I suspect you're asking how to completely ignore the device on the layout side. That sounds rather dangerous, because you're not really verifying anything - your layout could be completely wrong and you'd have no idea.

Anyway, the precise details as to how to achieve this are (as I said earlier) dependent upon which LVS tool you're using and probably the LVS rules for the technology. I would question whether ignoring the devices is anything like the right approach though! I'd be very nervous about performing LVS if I did this!

Andrew