• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. APS and XPS MS encountered a critical error during simu...

Stats

  • Locked Locked
  • Replies 2
  • Subscribers 125
  • Views 10921
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

APS and XPS MS encountered a critical error during simulation

zuiying
zuiying over 3 years ago

Hello! Recently, I wanted to simulate a SAR ADC using APS. The settings are as following:

But when I run it, an error occurred:

I don't know what happened. It just said it was an "internal error".

When I changed to XPS MS, the simulation started successfully. The settings are as following:

But after 1.8s, the simulation broke again. The same error occurred again:

Is this error due to my computer itself? Is there any way to solve it?

Thank you!

  • Cancel
  • ShawnLogan
    ShawnLogan over 3 years ago

    Dear zuiying,

    Speaking for myself only, the information you have provided does not allow me to say with any certainty as to the issue. However, a few items come to mind immediately that I will pass by you for your consideration. It would be very useful to me if I better understood the clock frequency relative to your transient simulation stop time, the step size observed during both the very limited spectre ++aps spectre.out file and the spectre XPS MS simulation spectre.out files, any values of simulation parameters "maxstep" or "strobe" times you may have included in your transient simulation, and the use of any ideal veriloga models in your netlist.

    Nevertheless, here are a few of my personal thoughts and their motivation...if they are are of any help at all zuiying!

    1. With regard to both the use of the ckpreset option of "sampled", as stated in the "Virtuoso Spectre Circuit Simulator and Accelerated Parallel Simulator User Guide" in Section 11.1:

    "The cktpreset option, with a possible value of sampled (cktpreset=sampled) enables Spectre or the APS technologies to take less time steps during conservative mode (errpreset=conservative) simulation, while improving simulation resolution at each time step."

    and the use of Spectre XPS, as stated in the "Spectre Classic Simulator, Spectre APS, Spectre X, and Spectre XPS User Guide
    Product Version 21.1, March 2022":

    "Spectre Extensive Partitioning Simulator (Spectre XPS), an advanced FastSPICE engine, which provides high performance simulation for SRAM, DRAM, and flash designs"

    each introduces different levels of simulation accuracy. There is no assurance that each will produce exactly the same output data nor use the same integration timestep. Your limited output file errors suggest to me that the error may be related to the integration time step of your two simulations. I am concerned that your integration time step (chosen by the simulator unless you are enforcing a value of simulation parameter "maxstep") is not sufficient to provide convergence. To add to my suspicion, you are invoking the spectre ++aps option - which also can introduce some reduction in accuracy relative to spectre or spectre APS (without the ++aps option).

    As a result, I might suggest the following potential paths to explore:

    a. Perform a spectre APS simulation (without the ++aps option and without the cktpreset "sampled" option) for a much shorter time interval using the errpreset "conservative" option than your current simulation time of 3.5805 seconds. This will reduce the maximum time step of the simulator since the maximum time step is computed from the stop time of your simulation and the value of parameter "errpreset".

    i. Does the simulation start successfully and, if so, how
    long does it run before encountering an error?

    ii.If it completes successfully, examine the spectre.out
    file to determine the step size of the integration. Try to
    submit a second simulation with the value of "maxstep" set
    to the approximate step size of the prior spectre.out file
    and extend the time of your simulation. If it is successful,
    try increasing the time a second time.

    These experiments might suggest you need to reduce the timestep to provide more simulation accuracy and prevent these unexpected errors.

    I have other suggestions, but I would start with these so as not to waste your time zuiying.

    I am sure other experts who monitor this forum will have more insightful thoughts, but these came to mind and I thought it worth at least passing them on to you.

    Shawn

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett over 3 years ago in reply to ShawnLogan

    Or you could do as the message suggested and contact customer support via Cadence Online Support (at http://support.cadence.com )

    Andrew

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information