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Discrepancy in Stability Analysis

Ashish Papreja

Hi, I am observing one discrepancy regarding stb analysis. Consider Case 1 where we have two non interacting loops as shown in the Fig. above. So lets say a dc voltage Vset is generated which is given to input of amplifier A2. Now I want to see stability analysis of second Loop consisting of Amplifier A2 and Feedback Factor B2 by placing an iprobe.

Then for Case 2, I used a constant dc voltage Vset of the same value that was generated from 1st Loop and then observed stability analysis (stb analysis) for the standalone structure . However I am observing different response for Loop Gain and Phase Plots.

What I feel is in case 1 Vset is an ac 0 for stb analysis and hence both loops are non interacting and therefore I should observe same plots in stb analysis.

Can Anyone help me to understand what am I missing here.

I am using spectre -W( subversion 15.0.1.257) virtuoso -W(subversion IC6.1.7-64b.500.10).

  • ShawnLogan

    Dear Ashish

    Ashish Papreja said:

    However I am observing different response for Loop Gain and Phase Plots.

    What I feel is in case 1 Vset is an ac 0 for stb analysis and hence both loops are non interacting and therefore I should observe same plots in stb analysis.

    Can Anyone help me to understand what am I missing here.

    I am not sure of the details for your two amplifiers A1 and A2 in your "Case-1". My questions include:

    1.Do they contain actual circuits?

    2. Are they "ideal" components with zero output impedances, infinite input impedances?

    3. Are you including any parasitic components in either amplifier?

    Let me make an assumption about the answers to my questions based on your observations if I may....

    My guess is that the reason your stability results are different using the topology "Case-1" when compared to "Case-2" is because the output impedance of amplifier A1 may not be ideal or zero (i.e, it has some finite impedance) and as a result its reverse transmission and its feedback factor B1 produce an impedance at the positive input terminal of amplifier A2. in your "Case-2", the output impedance of your "Vset(dc)" is exactly 0 and therefore it will shunt any signal on the positive input terminal of amplifier A2.

    Therefore, the stability of your "Case-1" and "Case-2" should be different. In effect, your "Case-2" has inserted a perfect isolation amplifier between the reference voltage generator amplifier of "Case-1" and the input terminal of your amplifier in "Case-2" and prevents any interactions between the two (i.e., feedthrough or effect of non-zero output impedance) . Your "Case-1" allows for interaction between the two amplifiers.

    Does this make sense and provide any insight for you Ashish?

    Shawn

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