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Pcells LVS fail. Master not found

RCardella

Hello,

I have create some pcell which are only layout. When I use them in the design the DRC checks (assura) runs correctly. The LVS instead give an error:

Reading the design data...
ERROR (AVVSI-10001): Input layout is incomplete. If you still want to continue the run, remove undefined placements from the layout or set '?errorOnMissingMaster nil' option in the RSF-file. (The default value of parameter '?errorOnMissingMaster' is 't'.)
*WARNING* Error while building the VDB


***** dfIIToVdb terminated abnormally *****

The only way is to add the ?ignoreCell on the pcell  or flatten the pcell. In that case LVS runs correctly.

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