how to include the verilogA content in the netlist

Dear BR,

sjwprcker said:

When i run sim with verilogA model + spectre simulator, the netlist only include a link to the .va file. Such a link is instant, meaning it only show the current content of verilogA. But i wish to find a way to show the verilogA content used in this sim result, whatever the current .va file it is. 

If I understand your question correctly, you would like to include the full veriloga code in the input.scs file at the time of netlisting in lieu of an containing an include statement with a path to the location of the veriloga file at the time of netlisting. If this is your objective, my understanding of Spectre netlists suggest this is not currently possible. Why do I suggest this?

First, if you examine the "include" statement for your veriloga code, you will notice its syntax is unlike the conventional include statement syntax of:

Include "<path_to_a_file>"

but rather it is:

ahdl_include "<path_to_veriloga_code>"

From the Spectre Circuit Simulator Reference 21.1, shown at URL:

https://support.cadence.com/apex/techpubDocViewerPage?xmlName=spectreref.xml&title=Spectre%20Circuit%20Simulator%20Reference%20--%20Other%20Simulation%20Topics%20-%20Verilog-A%20Usage%20and%20Language%20Summary%20(veriloga)&hash=pgfId-1049239&c_version=21.1&path=spectreref/spectreref21.1/chap4.html#pgfId-1049239

The manual notes that veriloga descriptions are written in files that are different from the Spectre netlist . In other words, veriloga code itself is not supported in a Spectre netlist. The ahdl_include statement is purposefully included in a Spectre netlist to allow the simulator to parse the veriloga code, compile it, and place it in a format necessary for simulation by Spectre.

However, with respect to your need, what I do in order to determine exactly what version of a piece of veriloga code was used in a simulation is to compare the timestamp of the input.scs file with the timestamp of the version(s) of the veriloga based subcircuit(s) in their respective libraries. For example, if you know version 1.3 of the veriloga code for subcircuit I1 was created at time Y and version 1.2 was created at time X, depending on the timestamp of your input.scs file, you can determine if the veriloga code for I1 was version1.2 or version 1.3. This assumes that you have some form of source control for the library containing the veriloga based modules.

Does this help at all BR?

Shawn

Hi ShawnLogan,

Thanks for your feedback. 

Let me re-phrase of my question. I have a verilog-A model --> .va file. 

I got result1 after the 1st simulation. 

Then I modify the .va file here and there, and got result2 after the 2nd simulation.

I notice reslt1 and result2 with some tiny differences. So I would like to concretely compare the two netlists. However, the netlists miss the verilog-A part, which is exactly i want to compare. 

If i click the link the .va file, i just got the current version of verilog-A (-->result2). How i can know the .va file content of result1 (just before my modification)?

BR

Hi,

Spectre doesn't save a copy of the VA model in the output directory, so you'll have to keep a track of the changes you make in the model if it's not under revision control (as Shawn explained).

Regards,

Saloni

Hi Saloni,

Thanks for your feedback.

Does "you'll have to keep a track of the changes you make in the model" means I need manually remember what is changed?

BR

Yes, you can add comments in the model if you are making changes to it. Or you can create multiple verilogA views..

Dear Saloni,

Thank you for adding your insight! 

sjwpacker,

Just to add to Saloni's comments about creating multiple views, a common way to append the name of the cell or its view with the date to uniquely trace one's changes. For example, slightly different versions of a veriloga cell "model_code" might be called model_code_080922a.va, model_code_080922b.va, or model_code_081022a.va, representing three modifications of the base code, 2 on 8/9/2022 and 1 on 8/10/2022.

This is in lieu of using a formal source control software if you do not use one. I might suggest you consider adopting one of your choice.

Shawn

Hi Saloni and Shawn,

Thanks all your comments. 

Hi Saloni and Shawn,

Thanks all your comments.