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Characterizing Transmission gate based cells for liberty file

NKFET

Hello,

I want to characterize a pass-transistor or transmission-gate-based standard cell (e.g., MUX or XOR). As the pull-up and pull-down networks are not connected to Vdd and Gnd, like standard CMOS, how can power consumption be measured? Can the Cadence Liberate manage it?

  • Hi,

    Have you already tried to characterized the cells with Liberate? to understand how the power is calculated by Liberate, you can use 'set_var power_info 1'. Liberate will save the expressions/results in a file under the deck area defined by extsim_deck_dir. Filename can be defined with power_info_filename. you may also save the decks using 'set_var extsim_save_passed deck'.

    Liberate only calculates power consumtion for the PG pins that are defined as pins of the cells. power due to input/load can be deducted during .lib generation. this is controlled by pin_based_leakage/power,  power_subtract_* and other power-related settings. 

    Regards,

    Guangjun

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