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  3. How use netlist and spectre_encrypt

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How use netlist and spectre_encrypt

yxHou
yxHou over 2 years ago

I am a new one for cadence, I would like to figure out the Usage process of a spectre_encrypt netlist.

  • How to import the encrypted netlist into a Library schematic
    • I can import the netlist without encrypt, but once I try to import encrypted netlist, cadence will through out some errors
    • I wonder I use this in a wrong way, but I can't find any reference to solve it.
  • How to use the encrypted netlist and other model to draw a new schematic

Can any body help me, thx.

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  • Andrew Beckett
    Andrew Beckett over 2 years ago

    Trying to create a schematic from an encrypted netlist really doesn't make sense - it would rather defeat the point if it being encrypted if it was possible!

    Most likely it would make sense to create a symbol with the pins for the block that is encrypted (hopefully the interface to the subckt is not encrypted so you can see the pin names etc), copy that to a spectre view, and then in Tools->CDF->Edit in the CIW, edit the Base CDF for the block in question and specify the termOrder in the Spectre simulation information section to match the order in the encrypted netlist. Then in ADE you can include the encrypted netlist via Setup->Model Libraries for example.

    If this isn't clear (there's a blog on this by our friend Tawna How to Simulate a Subcircuit (Netlist) With Spectre in ADE - RF Design - Cadence Blogs - Cadence Community ), please contact customer support.

    Andrew 

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  • yxHou
    yxHou over 2 years ago in reply to Andrew Beckett

    Sorry to bother you again,

    my subckt has some terminals, but they are encrypt, how can I do to solve this?

    If it's not encrypt, how can I do in CDF for this device? Does define this like subckt do?

    Thanks.

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to yxHou

    It's the same process that I pointed to before in my earlier reply. You need the terminal order in the spectre simulation information in the CDF to be in the same order as the subckt terminals (whether they are encrypted or not). The pin names on your symbol don't really matter; you just need to ensure that the names of the symbol pins are listed in the same order as the equivalent pins in the subckt are defined. If the subckt header is encrypted, somebody will need to tell you the order and meaning of the original subckt pins so you can line them up.

    There's nothing particularly magic about this; the challenge is that if the subckt line itself is encrypted, you can't use that to see the order yourself.

    Andrew

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  • yxHou
    yxHou over 2 years ago in reply to Andrew Beckett

    Sorry I didn't describe my question clearly, the question is when subckt has some device, and they have their own terminal, even I can get subckt pins, but the device pin was encrypt, in this situation, how can I simulate in ADE.

    Sincerely

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to yxHou
    yxHou said:
    Sorry I didn't describe my question clearly, the question is when subckt has some device, and they have their own terminal, even I can get subckt pins, but the device pin was encrypt, in this situation, how can I simulate in ADE

    I don't understand what you're saying here, sorry.

    Andrew

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  • yxHou
    yxHou over 2 years ago in reply to Andrew Beckett

    subckt low_power_inv in out
        M0 (out in 0 0) NMOS_VTH w=150n l=50n as=9.45e-15 ad=9.45e-15 ps=300n \
        pd=300n ld=105n ls=105n m=1
        M1 (out in vdd! vdd!) PMOS_VTH w=300n l=50n as=9.45e-15 ad=9.45e-15 \
        ps=300n pd=300n ld=105n ls=105n m=1
    ends low_power_inv

    like part of netlist below, M0 has it's pin out and in, but when I encrypt like this

    subckt low_power_inv in out
    <encrypt_content>
    ends low_power_inv

    device M0,M1 pin are hide, and when I use the method to simulate in ADE, an error comes out said can't find Model or subckt M0,M1.

    How can I deal with this? 

    Sincerely

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  • ShawnLogan
    ShawnLogan over 2 years ago in reply to yxHou

    Dear yxHou,

    yxHou said:
    device M0,M1 pin are hide, and when I use the method to simulate in ADE, an error comes out said can't find Model or subckt M0,M1.

    If I understand your explanation correctly, and I may not for which I apologize, you cannot access nodes internal to the encrypted netlist unless the nodes are inputs or outputs to the encrypted block. If your spectre error indicates the "models" can not be found, I would suggest the encrypted netlist is missing the model information for M0 and M1. I might suggest you contact the source of your encrypted netlist to inquire about the model information.

    Shawn

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  • yxHou
    yxHou over 2 years ago in reply to ShawnLogan

    Thank you for your answer, then if I want to use this subcircuit as a device and avoid the error that the model cannot be found, what information do I need to know, and what do I need to do in CDF or ADE.

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  • yxHou
    yxHou over 2 years ago in reply to ShawnLogan

    Thank you for your answer, then if I want to use this subcircuit as a device and avoid the error that the model cannot be found, what information do I need to know, and what do I need to do in CDF or ADE.

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to yxHou
    yxHou said:
    device M0,M1 pin are hide, and when I use the method to simulate in ADE, an error comes out said can't find Model or subckt M0,M1.

    It would really help to see the exact error message. The most likely is that you haven't included the model definitions for NMOS_VTH and PMOS_VTH. With an unencrypted netlist, you would get:

    Error found by spectre in `low_power_inv', during circuit read-in.
        ERROR (SFE-23): "forum155a.scs" 4: The instance `M0' is referencing an
            undefined model or subcircuit, `NMOS_VTH'. Either include the file
            containing the definition of `NMOS_VTH', or define `NMOS_VTH' before
            running the simulation.
        ERROR (SFE-23): "forum155a.scs" 6: The instance `M1' is referencing an
            undefined model or subcircuit, `PMOS_VTH'. Either include the file
            containing the definition of `PMOS_VTH', or define `PMOS_VTH' before
            running the simulation.

    However, if you encrypt the example above by protecting the internals:

    subckt low_power_inv in out
    protect
      M0 (out in 0 0) NMOS_VTH w=150n l=50n as=9.45e-15 ad=9.45e-15 ps=300n \
      pd=300n ld=105n ls=105n m=1
      M1 (out in vdd! vdd!) PMOS_VTH w=300n l=50n as=9.45e-15 ad=9.45e-15 \
      ps=300n pd=300n ld=105n ls=105n m=1
    unprotect
    ends low_power_inv

    and then run:

    spectre_encrypt -I low_power.scs -o low_power_enc.scs

    and use low_power_enc.scs as the design to include, it doesn't give much info about the problem:

    ERROR (SFE-74): Cannot run the simulation because an error was found in the
        protected block while reading the circuit. Contact the third-party who
        provided the protected block to correct it and rerun the simulation.

    This is intentional, because otherwise you could use this to reveal info about the internals of the encrypted design. It doesn't sound as if this is what you're seeing though, so you really will have to explain your problem better, and give precise details of what error you are seeing and where.

    Andrew

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  • yxHou
    yxHou over 2 years ago in reply to Andrew Beckett

    Thanks for your patience again.

    In fact, the message you show is what I meet, what I want to get your help is what can I actually do to deal with this problem.

    • If I need to encrypt, do I need to expose the interface like subckt for M0 and M1, only encrypt the content except the interface, and then define Model to correspond to M0 and M1?
    • If for an unencrypted netlist, how can I solve the problem of ERROR :
      • Either include the file containing the definition of `NMOS_VTH', or define `NMOS_VTH' before running the simulation.
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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to yxHou

    Presumably you have models for NMOS_VTH and PMOS_VTH somewhere in a file, and so you can just include these via setup->Model Libraries in ADE.

    You do not need to expose the interface for the subckt - although if you don't expose the interface you'll have to tell people what the interface is so that they know what order the pins need to be in. Given that the interface doesn't give much away and it's useless without knowing somehow, I'd probably just protect the contents not the interface.

    Andrew

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