Transient simulation

Dear paulinho,

paulinho said:

I accidentally happened to run a transient simulation on a circuit with only dc voltage sources. But the results seem to be showing transient waveforms at the nodes. So what is happening in the background ?. Is the simulator assuming a ramping voltage source in place of the dc voltage sources and performing the simulation ?

Without a look at your input.scs file, I can not be certain. I also am not sure of the magnitude in variation in node voltages you are observing. However, a few thoughts come to mind that I thought I would pass by you.

1. Have you included any capacitors (in either models or subcircuits) and/or assigned any initial conditions to nodes? If so, the transient solution will set the node(s) to the initial condition(s) you specified. Hence, over time, the voltage of nodes connected to capacitors will eventually settle to their steady-state DC values.

2. Some numerical noise will be present due to the integration algorithm. The magnitude of the noise is related to your simulator accuracy. However, I would expect the magnitude of this noise to be extremely small albeit nonzero. 

3. If your circuit has active devices, might there be a potential oscillation due to either circuit instability or insufficient numerical accuracy? In essence, are you sure all subcircuits are stable - even in the large signal sense? For example, if you were to perform a transient simulation accidentally on a set of series connected CMOS inverters with an actual or parasitic feedback mechanism with only one DC voltage source as the power supply, it may oscillate.

Shawn