Layout output pins changing the behaviour of extracted netlist

Greetings,

I am using virtuoso IC6.1.7-64b.500.15 to build an array of programmable ring oscillators (RO). I am employing a mix of library digital cells and custom cells to do so, following a custom IC analog design flow. I have a certain testbench where I send the appropiate control signals to the RO cell to make it oscillate according to its functionality. However, I am running into a strange issue when performing the simulation including parasites. I am using Calibre 2017.3_38.30 for the parasitic extraction. 

When I simulate one RO cell with parasitics it works well, oscillating when expected. However, when I build a column of 28 of these cells with the corresponding routing, it does not longer work with the parasitic extraction of the column, since I do not get any oscillations, the buffered output line remains constant. I initially thought It may be an issue with the capacitance of the output line, but I wanted to see the internal nodes of the cell to get the full picture. Im not sure if there's a better way to do this, but since the extracted netlist is not navigable I included "fake" output pins in the internal nodes of the layout of the cell that was supposed to oscillate and connected them to a noConn at the testbench level and performed the extraction again. 

I was very surprised to find that by including the pins the column actually works as expected. This does not make sense to me, since I have performed no changes in the physical layout (only included the labels for the internal pins) and the pins are output only, so it should not change the behaviour of the circuit. To simulate I used both spectre and the APS high performance mode, but I did not notice any difference between them. I am not sure if the issue comes at the extraction, because someohow those pins do change the way the parasitic extraction works, at the simulator level because the pins change how spectre handles those nodes or if there is something else I am missing. I know it is a very specific issue, but I would be very grateful if anyone could provide an intuition in how the pins changed the behaviour of the circuit and a way to make the column work without those pins to ensure that the design is working properly.

Kind regards,

Andrés