Digital signal overshoot and undershoot detection in Cadence

Dear Senan,

Senan said:

The practical measurement shows me overshoot and undershoot peaking behavioral when the digital output change from logic state to another as seen from the image below. The maginitude of these bouncing is sometimes high enough to unwillingly trigger the next connected digital parts.

I don't know enough about your measurement methodology, but I highly doubt the responses you show are the actual responses at the pins of your device. Why do I make such a "cynical" comment?.

1. If I compute the approximate frequency of the ringing, I am estimating a 35 MHz to 45 MHz resonance. This is very low for any type of on-chip resonance.

2. Secondly, as you show in the lower waveform, the amplitude is falling to -2 to -3 V. If this is any typical silicon MOS process, this low a voltage should be clamped by the substrate diode which is presumably connected to ground to something like -1 V.

Possible issues that can lead to this kind of artificial overshoot and undershoot include:

a. The lack of a ground connection to your probe

b. The use of a high impedance probe with a long ground clip connected to a ground electrically distant from the chip/substrate ground. The ground clip introduces a significant inductance in the ground connection (8" ~ 200 nH).

Senan said:

I wonder why this over-and-undershoot was not predicted with Cadence Virtuoso when I run the transient simulation, the result was coming clean, may be with one peak at every step change and I use the conservative transient simulation.

The degree to which your simulation accurately predicts measured performance is dependent on how well you model includes all chip/board and measurement parasitics. The use of a "conservative" set of simulator settings is great - but will not predict behavior for any components or component values from your IC/package/board that are overlooked.

Shawn

Dear Shawn,

Thank you very much for your answer and kind help,

At the start and what you see from my previous images, it was performed using 1X probe. I was not aware that 1X probe has limited performance as compared to 10 X in terms of speed. 

I have changed the probe setting to 10 X which has less probing capacitor and higher resistance ( 10M Ohm || 10 pF) and the result becoming better. I have compensated the drop in the vertical scale by multiplying the signal with 10 using the DSO options.

In the next step I have removed the long ground clip lead from the probe and replaced it with short spring connection, it gave me the next improvement.

Then also I have performed the probe compensation of the 10 X setting. So over all results are becoming far better.

Coming to your point, yes now I can confirm that those peaking are not the actual signals represented by my simulation. Because my simulation I didn't model the PCB/package trace inductance effect. My chip verification was indeed ended with the post layout simulation with RC extraction to the pad frame level with RC load model, no inductance load included.

To further improve my measurement, I am going to assemble SMA connectors on the PCB for signal testing, so I can test the points using direct SMA cable without a probe, I believe this should have the best response since I will only face 1M Ohm of the DSO internal resistance rather than 10M Ohm of the 10 X probe.

The last but not the least, may be I have to deal with signal termination techniques

Thank you Shawn once again and have a nice time

Best Regards  

Dear Senan,

Senan said:

Coming to your point, yes now I can confirm that those peaking are not the actual signals represented by my simulation.

Thank you for your update Senan! This is great news!

Senan said:

To further improve my measurement, I am going to assemble SMA connectors on the PCB for signal testing, so I can test the points using direct SMA cable without a probe,

This is an excellent idea. On all our signals that we intended to measure. we included SMA connectors or a former Tektronix high-impedance connector to allow for a low inductance measurement. I am confident that will make the measurement far more accurate - great!

Shawn