While I run post layout pss analysis for the divider (divide by 250), I get insufficient memory error. server ram is the 128G. I reduced PEX size to 10M but RAM is still not enough. I use Spec X for the simulation. How can I achieve pss analysis?
abdurrahman0234 said:While I run post layout pss analysis for the divider (divide by 250), I get insufficient memory error. server ram is the 128G. I reduced PEX size to 10M but RAM is still not enough. I use Spec X for the simulation. How can I achieve pss analysis?
It is highly likely the reason you are running out of memory is the ratio between your input and output frequencies (250). There is an article that speaks to this issue at
and it notes that a memory allocation of over 150 GB is reasonable for a divider ration less than your value of 250. Hence, it makes sense that your machine resources are insufficient for this simulation.
1. I am not sure what you are trying to measure with this type of simulation. Put another way, with a divider of 250, the noise of the divider itself is going to be miniscule on a unit interval basis.This, alone, will push the accuracy of the simulation to its limits. Perhaps if you provide the motivation for your interest in this simulation, it might allow others to suggest an alternative.
2. Usually, for both testability and simulation reasons, long divider chains are purposefully broken into a series of smaller dividers. As an example in your case with a divider of 250, it might be set to say two divide-by-five and 1 divide by 10 elements. This reduces testing time and simulation time. Is this something you or your manager have considered?
İ try to get Phasenoise analysis.
For broke the circuit, ıt may not be possible because of the feedback wires except input signal for the divider chains. You means that we divide two times input without broken circuit by using noise file from the result of the first division?