How to insert a probe for stb analysis without disturbing LVS?

Hi Stephan,

This came up in these forums a few times recently - but take a look at this article: How to perform a stability (stb) analysis on a loop within an extracted view or DSPF file

The easiest way is typically to use a metal resistor in the circuit, and then you can use the terminal of the metal resistor to act as your stability probe point. The metal resistor would then be there in both schematic and post-layout designs, and so you have something you can use for the stability analysis.

Andrew

Thanks Andrew, have downloaded the solution.

But I wonder, wouldn't this the most elegant solution:

Spectre needs e.g. a voltage probe to enable stb analsys. If it could take a resistor (like the proposed metal R), the flow would become much easier, by making a resistor to probe conversion on the  simulator side.

Bye Stephan

That's all very well if the resistor is small enough to be suitable to be replaced by a zero volt source. However, since you can achieve the same thing with the terminal of the resistor (or the terminal of a device if it's unique), it doesn't really add anything in my opinion - it would be just another way of achieving the same thing.

Andrew

Thanks, Andrew.

Can you tell me what is needed to replace an elelment like vsource with a short (lvsIgnore makes an open)??

Bye Stephan

StephanWeber said:

Can you tell me what is needed to replace an elelment like vsource with a short (lvsIgnore makes an open)??

Which tool are you talking about? LVS (if so which LVS tool)? Layout XL? Simulation? If it's for LVS, I'm not sure that would help because there would be nothing in the extracted view to probe. So it's not clear what you are trying to do here.

Andrew 

i Andrew, for the moment it is only about schematic simulation, so I can leave in the probe for stb in schematic. But with something like lvsIgnore, lvsShort and vlxShort (or whatever) I want to make sure that the layouter is not bothered in VXL usage and doing the LVS. From existing IP we know that post layout stability is very similar to pure schematic stb (because f3dB is only around 1MHz).

Bye Stephan

Add a boolean parameter "ignore" and set to true and a string parameter "lxRemoveDevice" and set to "(SHORT(A B))".  That should keep VXL happy.  Although for being able to run stb on an extracted layout, the two basic things I've done are

1)  close the loop at a higher hierarchy level.  I consider this to be an obsolete approach.

2) use a very small (1 square or less) metal resistor in some location that would break the loop.  Then you have something in your netlist in a known location (enforced via LVS) to use for the analysis. You can either point the stb analysis at one of the terminals of that resistor or play games with blackboxing during LVS+extraction and use an alternate schematic view for sim but since spectre lets you specify an instance terminal that is easier.