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  3. how to create a custom constraint group for Layout XL c...

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how to create a custom constraint group for Layout XL connectivity

sc07734
sc07734 over 2 years ago

In my current design setup, Layout XL mistakenly understand a dummy Metal _exclude_ (aka dummy block) layer to be connected to any overlapping Metal drawing shapes (with same Metal number) and thus misassigns nets during layout editing. I'd like to solve it by ignoring (i.e. excluding) the "exclude" purpose in the constraint set which XL uses to extract connectivity.

I found that to work well when I manually used the Net Tracer and / or MarkNet tool. In these tools F3 options dialog allows to create a "Custom" edits to connectivity set where I can specify which 'purposes' I want to exclude. I added 'exclude' to the list of excluded purposes (the similarity in wording here is unintended).

In Layout XL Options dialog I don't have such Custom choice, and have to choose from 5 preset choices (virtuosoDefaultExtractorSetup, foundry, Recommended ...). I suspect that the constraint set choices I see are a part of the techfile for the PDK. I'm looking for a way to add some modification directive to the existing constraints to accomplish the above.

I also found that Constraint Manager Assistant has a dialog called Process Rule Editor. Under "tech" category I see a list of 5 constraints that match the ones seen in Layout XL connectivity options. But the details of these constraints are not editable under 'tech' category, nor am I able to add a new constraint group of my own.

Is there a recommended process for this? I have Virtuoso IC6.1.8-64b.500.26

Thank you!

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  • sc07734
    sc07734 over 2 years ago

    Thank you for the link. I have learned how to write and load the Incremental Techfile into an existing design library; here I want to summarize it for any other 'Techfile beginner'.

    The content of the new Incremental Techfile below directs Virtuoso XL to ignore connectivity for the "exclude" purpose for all metal/poly/RX layers. This should logically be true since "exclude" purpose is an indicator layer not a physical one.

    ;********************************
    ; CONSTRAINT GROUPS
    ;********************************
    constraintGroups(

    ;( group [override] [definition] [operator] )
    ;( ----- ---------- ------------ ---------- )
    ( "newExtractorSetup" nil

    interconnect(
    ( validLayers ( RX PC M1 M2 M3 M4 M5 M6 MQ LM V1 V2 V3 V4 V5 VL VQ CA ) )
    ( validPurposes 'exclude ("exclude") )

    ) ;interconnect

    ) ;newExtractorSetup

    ) ;constraintGroups

    This is how I load this new Incremental Techfile into the design library (I merge it with the PDK techfile, already attached to the library):

    1. (should have been done already) Attach or compile the standard PDK Techfile into the design library upon creation

    2. CIW -> Technology File Manager -> Load -> select my Incremental Techfile text file -> Classes: Select All -> Merge (!! not Replace)

    3. Open Layout XL, in layout window: Options -> Layout XL -> Connectivity -> Verification Controls -> ... from constraint group (drop down menu) -> "newExtractorSetup"

    Note: Diagnostics Report can be used to show the connectivity rules loaded by Virtuoso XL from the combined new techfile code.

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  • RobMan
    RobMan over 2 years ago in reply to sc07734

    You can compile the incremental part of the ITDB into the design library or create a separate ITDB techlib. I recommend the latter. To do this..

      Create the new library e.g. 'myITDBtechLib'.

      Select "Reference existing technology libraries'.

      On the next form select the PDK techlib and push over to the right as the refTechLib.

      OK and create the library.

      Now from the 'Technology File Manager' dump the ascii techfile for myITDBtechLib

      Edit the file. It will start with something like this...  

    ; Technology File gpdk045_ITDB
    ; Generated on Apr 24 17:15:42 2020
    ; with @(#)$CDS: virtuoso version 6.1.8-64b 03/10/2020 22:02 (cpgbld01) $


    ;********************************
    ; CONTROLS
    ;********************************
    controls(
    techVersion("1.0")

    refTechLibs(
    ; techLibName
    ; -----------
    "gpdk045"
    ) ;refTechLibs

    ) ;controls

    See how it references the pdk techlib.

    Now add any customisation (your constraint group) to this file.

    Then load use the 'Technology File Manager' to load the modified file into the new 'myITDBtechLib'.

    Save it.

    For a sanity check you can dump it out again to check it has loaded correctly.

    N.B. Once you are familiar with how 'refTechLibs' is used you can just write this from scratch and avoid the dump/edit part. I just included that so you understood some detail.

    Finally you need to attach or reference the new  'myITDBtechLib' from your design library. Use the 'Technology File Manager' again for this. I recommend 'Reference'. It offers more flexibility. The design lib can include ITDB elements if you wish.

    You can also use 'Graph' to view the ITDB hierarchy in detail. FYI: Also available from the Layout window Tools -> Technology Database Graph.

    Rob.

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  • sc07734
    sc07734 over 2 years ago in reply to RobMan

    Rob, thank you! I now understand to Attach (or 'Reference' <- unrelated to refTechLibs directive) a techfile lib to the design lib, rather than Load or compile the techfile ASCII into the design lib like I did above.

    And I see that we use refTechLibs( "tech_lib_name" ) to reference the pdk/main tech lib, and then write our code, and thus make the new code additive.

    Finally, I used Load for new itdb file b/c I am replacing a techfile already attached or compiled in the existing design lib, not starting with a brand new design lib.

    If I want to attach the itdb_lib to an existing design lib which already has a complied techlib in it, I found I need to delete tech.db (and/or data.dm?) files first in that design lib directory, and only then I am able to Attach the new itdb_lib. I don't know if this last approach has any downsides, but seems to work so far.

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  • RobMan
    RobMan over 2 years ago in reply to sc07734

    You cannot "attach" an itdb_lib to a (pre-compiled) techlib. The itdb_lib must "reference" the techlib. The reference is handled by 'refTechLibs(...' in the itdb_lib techfile. Using the gui to "attach" is the equivalent. Deleting the techlib techfile is not correct. Without a techfile I wouldn't expect you to be able to attach or reference.

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  • RobMan
    RobMan over 2 years ago in reply to sc07734

    You cannot "attach" an itdb_lib to a (pre-compiled) techlib. The itdb_lib must "reference" the techlib. The reference is handled by 'refTechLibs(...' in the itdb_lib techfile. Using the gui to "attach" is the equivalent. Deleting the techlib techfile is not correct. Without a techfile I wouldn't expect you to be able to attach or reference.

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