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Designing a Two stage CMOS OP Amp using Cadence Virtuoso_hspiceD simulator

Indhu Sekar
Indhu Sekar over 2 years ago

Hi,

I am working on my academic project on 2 stage Cmos Op amp design and to run simulation for dc,ac and tran analyses using FREEPDK15 downloaded from this https://labs.ece.ncsu.edu/eda/downloads/downloads/687ac383-dd08-47eb-9150-f3f1af81be1b?expires=1682099952&signature=e8658191c60708cc15e73098a9eff1a959bb7512a3d5db36b3c20095dbaa82d8 I am facing this error tried many possibilty from reading the solutions form this forum but it would be great if someone can help with the exact issue that I am facing. Also the simulator is "hspiceD".

Getting schematic propert bagGetting schematic propert bagINFO (SCH-1181): "OPAMP Opamp schematic" saved.
Delete psf data in /home/isekar0315/cadence/simulation/Opamp/hspiceD/schematic/psf.
generate netlist...
Begin Incremental Netlisting Apr 14 21:55:05 2023
ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'hspiceD spice cmos_sch cmos.sch schematic', for the
instance 'I9' in cell 'Opamp'. Add one of these views to the cell 'idc' in the
library 'NCSU_Analog_Parts', or modify the view list so that it contains an existing view.

End netlisting Apr 14 21:55:05 2023
ERROR (OSSHNL-514): Netlist generation failed because of the errors reported above. The netlist might not have been generated at all, or the generated netlist could be corrupt. Fix the reported errors and regenerate the netlist.
...unsuccessful.

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  • Indhu Sekar
    Indhu Sekar over 2 years ago

    Got stuck with the below error while trying to run a dc analysis for a two stage cmos op amp using freepdk15. Please help.

    ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'hspiceD spice cmos_sch cmos.sch schematic', for the
    instance 'I9' in cell 'Opamp'. Add one of these views to the cell 'idc' in the
    library 'NCSU_Analog_Parts', or modify the view list so that it contains an existing view.

    End netlisting Apr 14 21:55:05 2023
    ERROR (OSSHNL-514): Netlist generation failed because of the errors reported above. The netlist might not have been generated at all, or the generated netlist could be corrupt. Fix the reported errors and regenerate the netlist.
    ...unsuccessful.

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to Indhu Sekar

    You should take this up with NCSU - the latest CDK (1.6) does not have any support for hspiceD with NCSU_Analog_Parts. It supports hspiceS, but that's not been supported for 15 years or so in Cadence tools - and never in the OpenAccess-enabled version of the tools (which is what this library is for). So it's a conversion from some older data, I guess.

    I would suggest that you use components such as idc from analogLIb (add this to your cds.lib if you don't have it):

    DEFINE analogLib $(inst_root_with:tools/dfII/bin/virtuoso)/tools/dfII/etc/cdslib/artist/analogLib

    as this will support hspiceD.

    Or maybe you'd be better off using something like the Cadence-provided GDKs that can be found at http://pdk.cadence.com

    Regards,

    Andrew

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  • Indhu Sekar
    Indhu Sekar over 2 years ago in reply to Andrew Beckett

    Appreciate your help on this. I did follow your step on adding the analogLib below. But still I am facing the same error. I am exploring the chances for downloading the PDK from cadence as well. It will be really great If you could help on this. Thanks..

    SOFTINCLUDE $SYSTEM_CDS_LIB_DIR/cds.lib

    DEFINE analogLib $CDS/tools/dfII/etc/cdslib/artist/analogLib

    DEFINE basic $CDK_DIR/lib/basic

    DEFINE NCSU_Analog_Parts $CDK_DIR/lib/NCSU_Analog_Parts

    DEFINE NCSU_Digital_Parts $CDK_DIR/lib/NCSU_Digital_Parts

    #DEFINE      MOSIS_Layout_Test       $CDK_DIR/lib/MOSIS_Layout_Test

    DEFINE NCSU_TechLib_ami06 $CDK_DIR/lib/NCSU_TechLib_ami06

    DEFINE NCSU_TechLib_ami16 $CDK_DIR/lib/NCSU_TechLib_ami16

    DEFINE NCSU_TechLib_hp06 $CDK_DIR/lib/NCSU_TechLib_hp06

    DEFINE NCSU_TechLib_tsmc02 $CDK_DIR/lib/NCSU_TechLib_tsmc02

    DEFINE NCSU_TechLib_tsmc02d $CDK_DIR/lib/NCSU_TechLib_tsmc02d

    DEFINE NCSU_TechLib_tsmc03 $CDK_DIR/lib/NCSU_TechLib_tsmc03

    DEFINE NCSU_TechLib_tsmc03d $CDK_DIR/lib/NCSU_TechLib_tsmc03d

    DEFINE NCSU_TechLib_tsmc04_4M2P $CDK_DIR/lib/NCSU_TechLib_tsmc04_4M2P

    DEFINE ANALOGIC /home/isekar0315/project2/ANALOGIC

    DEFINE NCSU_Techlib_FreePDK15 NCSU_TechLib_FreePDK15

    DEFINE OPAMP /home/isekar0315/project3/OPAMP

    #Removed by ddDeleteObj: DEFINE OPAMP1 /home/isekar0315/project3/OPAMP1

    DEFINE OPAMP1 /home/isekar0315/project3/OPAMP1

    Andrew Beckett said:
    /analogLib
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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to Indhu Sekar

    Did you change instance I9 in your schematic to use idc from analogLib rather than idc from NCSU_Analog_Parts? Simply adding the path to analogLib into cds.lib alone won't fix it - you need to change any references to components from NCSU_Analog_Parts to use analogLib instead (assuming there are equivalents).

    Andrew

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  • Indhu Sekar
    Indhu Sekar over 2 years ago in reply to Andrew Beckett

    Oh that makes a lot of sense. I did that and it works now, I mean fixed the previous error. But again a warning has been thrown. What would be the issue with the memory? 

    Netlisting Statistics:
    Number of components: 15

    Elapsed time: 1.0s (15.00/s)
    Errors: 0 Warnings: 0
    ...successful.
    compose simulator input file...
    ...successful.
    start simulator if needed...
    ...successful.
    *Warning* The version of the Hspice simulator that you are using may not
    support the generation of PSF output on Linux. If you are having
    trouble viewing simulation results, please contact Hspice customer
    support to identify the version that supports this capability.
    simulate...
    INFO (ADE-3069): Errors encountered during simulation. For more information, see the log files
    accessible from the Simulation -> Output Log menu.

    Output log menu

    Using: /export/opt/synopsys/hspice/O-2018.09-SP2-2/hspice/linux64/hspice input.ckt

    ****** HSPICE -- O-2018.09-SP2-2 linux64 (May 9 2019) ******
    Copyright (c) 1986 - 2023 by Synopsys, Inc. All Rights Reserved.
    This software and the associated documentation are proprietary
    to Synopsys, Inc. This software may only be used in accordance
    with the terms and conditions of a written license agreement with
    Synopsys, Inc. All other use, reproduction, or distribution of
    this software is strictly prohibited.
    Input File: input.ckt
    Command line options: /export/opt/synopsys/hspice/O-2018.09-SP2-2/hspice/linux64/hspice input.ckt
    Start time: Sat Apr 15 13:40:05 2023


    The tool has just run out of memory:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

    '72860712 72902327 72908288'
    MEM Fatal: Out of memory (MEM-1)


    The tool has just run out of memory:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

    '72860712 72902327 72908288'
    MEM Fatal: Out of memory (MEM-1)


    The tool has just run out of memory:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

    '72860712 72902327 72908288'
    MEM Fatal: Out of memory (MEM-1)


    The tool has just run out of memory:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

    '72860712 72902327 72908288'
    MEM Fatal: Out of memory (MEM-1)


    The tool has just run out of memory:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

    '72860712 72902327 72908288 139982512346589'
    MEM Fatal: Out of memory (MEM-1)
    **error** invalid memory reference

    **error** invalid memory reference

    1****** HSPICE -- O-2018.09-SP2-2 linux64 (May 9 2019) ******
    ******

    ****** job statistics summary tnom= 0.000 temp= 0.000 ******

    ****** Machine Information ******
    CPU:
    model name : Intel(R) Xeon(R) Gold 6248R CPU @ 3.00GHz
    cpu MHz : 1200.044

    OS:
    Linux version 5.4.0-135-generic (buildd@lcy02-amd64-066) (gcc version 9.4.0 (Ubuntu 9.4.0-1ubuntu1~20.04.1)) #152-Ubuntu SMP Wed Nov 23 20:19:22 UTC 2022


    ****** HSPICE Threads Information ******

    Command Line Threads Count : 1
    Available CPU Count : 96
    Actual Threads Count : 1


    ****** Circuit Statistics ******
    # nodes = 0 # elements = 0
    # resistors = 0 # capacitors = 0 # inductors = 0
    # mutual_inds = 0 # vccs = 0 # vcvs = 0
    # cccs = 0 # ccvs = 0 # volt_srcs = 0
    # curr_srcs = 0 # diodes = 0 # bjts = 0
    # jfets = 0 # mosfets = 0 # U elements = 0
    # T elements = 0 # W elements = 0 # B elements = 0
    # S elements = 0 # P elements = 0 # va device = 0
    # vector_srcs = 0 # N elements = 0


    ****** Runtime Statistics (seconds) ******

    analysis time # points tot. iter conv.iter
    op point 0.00 1 0
    readin 0.00
    errchk 0.00
    setup 0.00
    output 0.00


    peak memory used 0.00 megabytes
    total cpu time 0.00 seconds
    total elapsed time 0.01 seconds
    job started at 13:40:05 04/15/2023
    job ended at 13:40:05 04/15/2023


    lic: total license checkout elapse time: 0.00(s)

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  • ShawnLogan
    ShawnLogan over 2 years ago in reply to Indhu Sekar

    Dear Indhu Sekar,

    Indhu Sekar said:
    But again a warning has been thrown. What would be the issue with the memory? 
    Indhu Sekar said:
    ****** HSPICE -- O-2018.09-SP2-2 linux64 (May 9 2019) ******
    Copyright (c) 1986 - 2023 by Synopsys, Inc.

    I am not sure if this is the best Forum to expect a good answer to your latest log file error as it appears it is related to the simulator HSPICE which is not a Cadence tool.

    Nevertheless, I thought I might ask if you are sure you are using the 64 bit version of HSPICE on your machine? The Intel(R) Xeon(R) Gold 6248R is a 64 bit machine. If you are not specifying the 64 bit version of HSPICE, you might be trying to run a 32 bit binary on a 64 bit machine. 

    I think there is an HSPICE environmental variable that requests the 64 bit version, or maybe the command line option "hspice -64" will assure you are using the 64 bit version. What spurred this thought was the comment in your log fiel:

    "**error** invalid memory reference" 

    However, I have-not used HSPICE for many years - so this is a pure guess on my part.

    Shawn

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  • Indhu Sekar
    Indhu Sekar over 2 years ago in reply to ShawnLogan

    Apologies. I ran the hspice -64 -i "netlist_file" -o report . But its throwing the same below..

    72860712 72902327 72908288 140698003555805'

    MEM Fatal: Out of memory (MEM-1)

    The tool has just run out of memory:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

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  • Andrew Beckett
    Andrew Beckett over 2 years ago in reply to Indhu Sekar

    I'd be pretty surprised if your circuit was big enough to cause it to run out of memory (especially if this is the first circuit you are trying to run). Something has got seriously messed up here - the error line:

    Memory allocated = 0 MB, Request size = 1514322004463140864 bytes.

    is suggesting that it is trying to allocate 1.5 million Terabytes. 

    Can you post the netlist you are getting (Simulation->Netlist->Create or Display)? Maybe there's something wrong in the analysis setup which is causing it to explode the memory consumption.

    In general, this is the wrong place (as Shawn said) to be asking about issues with HSPICE, since it is not a Cadence tool but a simulator provided by Synopsys. I have limited access to HSPICE these days (although I used it as a designer over 25 years ago) - but there is a chance I (or someone else) might be able to spot a glaring error.

    Thanks,

    Andrew

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  • Indhu Sekar
    Indhu Sekar over 2 years ago in reply to Andrew Beckett

    Hello, Andrew I really appreciate the help here. I agree I am at the wrong place but still I thought I might post here since I am not sure whether I am making any mistake on the design. Also, I am a beginner with this tool and your directions helped in fixing the previous errors.  As you have asked to post the NETLIST, please do check. Also, I have uploaded my design as well. 

    NETLIST:

    ** Generated for: hspiceD
    ** Generated on: Apr 15 21:18:09 2023
    ** Design library name: OPAMP
    ** Design cell name: Opamp
    ** Design view name: schematic
    .GLOBAL vdd!
    .PARAM vcm=1.6


    .DC VCM 0.0 3.3 100e-3

    .TEMP 25.0
    .OPTION
    + ARTIST=2
    + INGOLD=2
    + PARHIER=LOCAL
    + PSF=2
    + HIER_DELIM=0
    .INCLUDE "/home/isekar0315/project3/freepdk15-v12/FreePDK15/hspice/models/fet.inc"

    ** Library name: OPAMP
    ** Cell name: Opamp
    ** View name: schematic
    m4 vout net1 vdd! vdd! pmos L=1e-6 W=15e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m3 net15 _net1 net4 net4 pmos L=1e-6 W=15e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m2 net12 _net0 net4 net4 pmos L=1e-6 W=15e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m1 net4 net1 vdd! vdd! pmos L=1e-6 W=15e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m0 net1 net1 vdd! vdd! pmos L=1e-6 W=15e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m7 vout net15 0 0 nmos L=1e-6 W=4.5e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m6 net15 net12 0 0 nmos L=1e-6 W=4.5e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    m5 net12 net12 0 0 nmos L=1e-6 W=4.5e-6 AD=608e-18 AS=608e-18 PD=168e-9 PS=168e-9 M=2
    i10 net1 0 DC=10e-6
    r0 net15 net3 1e3
    c1 vout 0 5e-12
    c0 net3 vout 1.1e-12
    v1 _net1 0 DC=vcm
    v2 _net0 _net1 DC=0 AC 1e-3
    v0 vdd! 0 DC=3.2
    .END

    Thanks, 

    Indhu

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  • ShawnLogan
    ShawnLogan over 2 years ago in reply to Indhu Sekar

    Dear Indhu Sekar,

    Thank you for including your netlist and schematic! I did look at the netlist and your schematic and noticed that your schematic nodes VIN+ and VIN- appear to be re-named to _net0 and _net1 from the netlist lines:

    v1 _net1 0 DC=vcm
    v2 _net0 _net1 DC=0 AC 1e-3

    I also noticed that the analysis you are running calls for a DC sweep with VCM between 0 and 3.3V with a supply voltage of 3.2 V. With VCM = 0, the full 3.2 V might appear across the two input device VGS. I don't know anything about how your FET models behave, but from your log it states:

    analysis time # points tot. iter conv.iter
    op point 0.00 1 0

    which suggests it attempted a DC operating point, but it did not converge. Two thoughts:

    1. Change your DC sweep to a DC operating point only, but with the common-mode set to something mid supply, such as 3.2V/2 = 1.6.

    2. Replace your device models with an ideal device model (in essence, replace your PDK) to determine if your model behavior is non-physical and resulting in a matrix that HSPICE cannot handle.

    Shawn

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