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Synthesizing Memory

I was wondering if one can explain the general steps of synthesizing memory in Cadence, I found this but didn't help much.

memory synthesis RTL Compiler commands - Logic Design - Cadence Technology Forums - Cadence Community

Objective is to achieve synthesized schematic and layout for say few MB SRAM.

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Andrew Beckett over 2 years ago

What do you mean by "in Cadence"? Do you mean what we do as a company? There's no tool called "Cadence", so you could mean many things...
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illaoi over 2 years ago in reply to Andrew Beckett

sure, virtuoso.
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Andrew Beckett over 2 years ago in reply to illaoi

Well, there's no built-in tool in Virtuoso that does this. Maybe take a look at https://www.cadence.com/ko_KR/home/tools/ip/design-ip/denali-memory-interface-and-storage-ip.html

Andrew
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Andrew Beckett over 2 years ago in reply to illaoi

Well, there's no built-in tool in Virtuoso that does this. Maybe take a look at https://www.cadence.com/ko_KR/home/tools/ip/design-ip/denali-memory-interface-and-storage-ip.html

Andrew
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