Ramp signal generator in Verilog-A

Dear delgsy,

delgsy said:

but I do not like the way I wrote it, i.e., 100ns is used in the argument for transition().
The result also shows 800mV at the beginning which I do not understand why.
Maybe there is a more proper way to realize this.

If you are interested, a couple of comments that come to mind...

1. In general, a more common means of creating a ramp generator is to use the integration function idt(). In this fashion, you can set the slope of the ramp in lieu of using the rise time parameter of the transition filter. Hence, if you use a statement similar to:

  V(out) <+  idt(slope*1.0,ramp_init)

and specify the value of slope as (0.80 - 0.50)/100e-09, after 100 ns it will set out to 0.80 V from an initial value of 0.50 V. You will need a second event (timer or conditional statement to monitor value of V(out)) to stop the integration when its value reaches your desired maximum value of 0.80 V.

2. With respect to your observation that your code produces an 800 mV output value at the start of your simulation, I noted you did not include an initial_step event in your snippet. Perhaps you included it outside of your posted code? An initial_step event is executed only on the first point of the analysis and is commonly used to initialize signals and variables.

real ramp_init = 0.50;

analog begin
  @(initial_step) begin
   ramp = ramp_init ;
end

Shawn