transient noise simulation

The trouble is likely to be that the extraction has probably flattened the hierarchy, and so using hierarchical instances is simply not going to work in this case...

Andrew

Dear analog2,

analog2 said:

does someone have an idea how to solve it?

Andrew is correct, but I thought I would offer a technique I often used to maintain the hierarchy and yet provide a good estimate of the layout parasitics that the flattened hierarchy will produce. In Figure 1, I basically re-define each of the instances you include in your noise options panel as both the instance itself and the layout features that interconnect it to its neighbors. In this fashion, I can still use my top level schematic, but with a config view, will instantiate the extracted view of the newly defined layout boundaries for each instance. In this fashion, there are no layout features between each instance as the layouts of each directly abut. Hence, if you want to enable or disable the noise of N instances, you will create N layouts of each of the N instances where the layout of each includes the traces between it and its neighbors. I hope my explanation makes some sense analog2!

Shawn

Figure 1

thx Andrew for the clarification! 

could you please state if there's a way to approach the instances after hierarchy was flatten?

Noted that while locating the full "instance hierarchy path" until transistor level( for example: /ff00/data_cs_buf/cs_inv/sinv_dpmos/mpb"), in some cases it managed to recognize the device. however, not consistently...

Thx Logan for the suggestion. it sound like a good option.

while considering your methodology, i guess i can use only 2 abutted layouts where i have the noised region & the non-noised region.

Dear analog2,

analog2 said:

i guess i can use only 2 abutted layouts where i have the noised region & the non-noised region.

If you want to enable the noise for one region, for example an instance inv_1_noisy, and disable it for a second layout region that abuts inv1_noisy, say, an instance of inv_2_no_noise, then create two layout regions "inv_1_noisy" and "inv_2_no_noise". In your schematic, connect an instance of  "inv_1_noisy" directly to an of instance of "inv_2_no_noise". If you do not have one already, create a config view for your test bench. Select the extracted views of "inv_1_noisy" and "inv_2_no_noise" for each instance respectively in your config view and recreate a netlist. Make sure your Assembler/Explorer test is using the config view of your test bench and not its schematic view.

analog2 said:

could you please state if there's a way to approach the instances after hierarchy was flatten?

I will not pretend to answer for Andrew, but although you cannot use your schematic hierarchy to refer to the entire instance, if you specifically include the names of all devices that formed one of your schematic instances (all the devices, including those multi-fingered devices composed of distinct devices in the layout fingers) using their full netlist names, you could conceivably enable or disable the noise for each device in the instance. I you create an extracted view based netlist, you can view the proper syntax to refer to each device you want to enable or disable the noise.

Shawn