Stats

  • Locked Locked
  • Replies 1
  • Subscribers 126
  • Views 5353
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Conductance Matrix : Circuit solution

Saikiran IND

Hello,

 I am working on something and wanted to know how the cadence/spectre/spice approach to solving a circuit (especially a MOS device) changes when there is an instance of a topological change (defect). For instance, how is the nodal solution generated for a 5T op amp and how does the approach differ in the presence of a Gate-Drain or a Gate-Source short in any of the devices in the 5T?  How is the solution approach in the simulator different? When solving circuits with MOS transistors, how is the conductance matrix of the circuit generated? Is this information that can be shared?  Are there any reference materials you can share such that we can see how analytically the solution in any circuit (especially one with a MOS device) is modelled and solved?

 The circuit simulator may approach the solution through a Newton-Raphson iterative process and if that is the case, it means that in some way the circuit simulator generates a matrix equation equivalent of the circuit. I want to understand/know how this is done for a MOS structure.

Thanks

Saikiran

Parents

  • Dear Saikiran IND,

    Saikiran IND said:
     I am working on something and wanted to know how the cadence/spectre/spice approach to solving a circuit (especially a MOS device) changes when there is an instance of a topological change (defect). For instance, how is the nodal solution generated for a 5T op amp and how does the approach differ in the presence of a Gate-Drain or a Gate-Source short in any of the devices in the 5T? 

    A "solver" knows nothing about a "topological change" unless you purposefully include the impact of the change in the netlist that serves as one of the solver's input. A second input to the solver (which could be considered the same) are the models for the devices you included in your netlist. From the models and the circuit topology you included in the netlist, a set of equations is generated and solved using one of a number of numerical integration techniques.

    Saikiran IND said:
    Are there any reference materials you can share such that we can see how analytically the solution in any circuit (especially one with a MOS device) is modelled and solved?

    i might suggest you study available online material for SPICE - which was really one of the first major circuit simulators and developed at University of California Berkeley many years ago. Perhaps I am misunderstanding your question, but I assume you may not be familiar with circuit simulators. There are many, many textbooks that describe SPICE in detail and include the mechanics of its various means for numerical integration. A more advanced text is The Designer's Guide to SPICE and Spectre by Ken Kundert, There are also texts and many articles on the models for MOS devices, such as MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4 published by IEEE press and by William Liu.

    I hope I understood your basic question and this is of some help Saikiran IND.

    Shawn

Reply

  • Dear Saikiran IND,

    Saikiran IND said:
     I am working on something and wanted to know how the cadence/spectre/spice approach to solving a circuit (especially a MOS device) changes when there is an instance of a topological change (defect). For instance, how is the nodal solution generated for a 5T op amp and how does the approach differ in the presence of a Gate-Drain or a Gate-Source short in any of the devices in the 5T? 

    A "solver" knows nothing about a "topological change" unless you purposefully include the impact of the change in the netlist that serves as one of the solver's input. A second input to the solver (which could be considered the same) are the models for the devices you included in your netlist. From the models and the circuit topology you included in the netlist, a set of equations is generated and solved using one of a number of numerical integration techniques.

    Saikiran IND said:
    Are there any reference materials you can share such that we can see how analytically the solution in any circuit (especially one with a MOS device) is modelled and solved?

    i might suggest you study available online material for SPICE - which was really one of the first major circuit simulators and developed at University of California Berkeley many years ago. Perhaps I am misunderstanding your question, but I assume you may not be familiar with circuit simulators. There are many, many textbooks that describe SPICE in detail and include the mechanics of its various means for numerical integration. A more advanced text is The Designer's Guide to SPICE and Spectre by Ken Kundert, There are also texts and many articles on the models for MOS devices, such as MOSFET Models for SPICE Simulation: Including BSIM3v3 and BSIM4 published by IEEE press and by William Liu.

    I hope I understood your basic question and this is of some help Saikiran IND.

    Shawn

Children
No Data

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.