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Hysteresis phenomenon in frequency tripler

Restart

the figure1 is a double band frequency tripler. The so called "double band" means it has two frequency tuning ranges which can triple the frequency. And we can make this by tuning the DC voltage "Vtune", which control the combination of varactors and resistors(showed in the red circle in fig1 and fig2) to change the free running osicallation frequency, so that frequency tuning range change . That means, the two frequency tuning range transfer between each other when tuning the DC voltage Vtune, but during the transferring, it has the hysterisis phenomenon, which means the curve of free running osicallation frequency vs Vtune for Vtune low to high is different from that for Vtune high to low. I want to ask that, how to make this hysterisis effect by cadence, like the fig3.

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  • The software I use is CentOS 7 64-bit ,TSMC 0.18 UM CMOS Mixed Signal RF General Purpose MiM FSG Al 1P6VM 1.8&3.3V

  • in reply to Restart

    Dear Restart,

    As I believe the authors of the paper you reference may have done from their plot, I think you just need to sweep the value of the tuning voltage using a staircase waveform (or equivalently apply a digital word to an ideal D/A converter) in both directions in a transient simulation. The dwell time at each step of the waveform is chosen by the amount of time required for the VCO frequency to settle within your desired accuracy. At the end of each step, measure the VCO output frequency over some time interval. The amount of time to remain at each step must be chosen to be a good number of VCO frequency time constants.

    From the plot you included, it appears the control voltage is stepped in 100 mV increments between 0 V and 2.0 V for a total of 21 steps. I'm shown an example of what I think might be the two transient simulations (or one simulation where the negatively sloped ramp follows the positively sloped ramp) to use and the control voltage stimulus. I hope I understood your question and this provides you with some insight Restart.

    Shawn

    Figure 1

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  • in reply to Restart

    Dear Restart,

    As I believe the authors of the paper you reference may have done from their plot, I think you just need to sweep the value of the tuning voltage using a staircase waveform (or equivalently apply a digital word to an ideal D/A converter) in both directions in a transient simulation. The dwell time at each step of the waveform is chosen by the amount of time required for the VCO frequency to settle within your desired accuracy. At the end of each step, measure the VCO output frequency over some time interval. The amount of time to remain at each step must be chosen to be a good number of VCO frequency time constants.

    From the plot you included, it appears the control voltage is stepped in 100 mV increments between 0 V and 2.0 V for a total of 21 steps. I'm shown an example of what I think might be the two transient simulations (or one simulation where the negatively sloped ramp follows the positively sloped ramp) to use and the control voltage stimulus. I hope I understood your question and this provides you with some insight Restart.

    Shawn

    Figure 1

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