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Mutiport simulation using ADE-XL or ADE-L

Hi all,

I am trying to use ADE-L or ADE-XL to simulate a 16-bit carry-lookahead adder. The ports are defined as A<15:0>, B<15:0>.

Our Cadence virtual machine seems to have no NC-verilog function...Thus, I could only use the ADE-L for simulation. However, it seems that creating 16 voltage sources for testbench is not very effective for verifying the design. So is there any other choice that could quickly simulate a number of test cases?

Thanks for any one who can provide me some advice.

Andrew Beckett over 1 year ago

Assuming you're using Spectre as the simulator, you could use a vector file. See this post from yesterday.
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