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  3. Bias setting of spectre

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Bias setting of spectre

shareemotion
shareemotion over 1 year ago
Using Specter, we are extracting the capacitance information of the mosfet using captab. 

I connected the source to gnd and set it to 0V, but when I displayed it in verilog-a, it showed 0.5V.

I reviewed the netlist and va files several times, but no unusual features were found.

Why does the specter itself set the voltage like this?
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  • Andrew Beckett
    Andrew Beckett over 1 year ago

    You’ll need to share more information than this - what does the circuit look like? A picture of the schematic and also sharing the netlist would help. Also, what is in the Verilog-A model? I’m sure there’s a reason, but guessing what it might be from so little data is almost impossible…

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  • Andrew Beckett
    Andrew Beckett over 1 year ago

    You’ll need to share more information than this - what does the circuit look like? A picture of the schematic and also sharing the netlist would help. Also, what is in the Verilog-A model? I’m sure there’s a reason, but guessing what it might be from so little data is almost impossible…

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