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  3. About PLL phase noise simulation (pss+pnoise or hb+hbnoise...

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About PLL phase noise simulation (pss+pnoise or hb+hbnoise?)

MOS
MOS over 1 year ago

Hi,

I spent a lot of time doing phase noise simulations of circuits like CASE-3 with pss+pnoise. I understand that when simulating with pss+pnoise, it is necessary to set the pss beat frequency to 240MHz. The beat frequency of pss and pnoise will automatically be the same value. In order to check the phase noise of OUTB (480MHz), I stopped the circuit operating at 240MHz and set the beat frequency to 480MHz. However, I think this is not a best method. After reading the manual I think it might be better to use hb+hbnoise. I have a question about the settings and measurements when measuring the phase noise. I am a beginner in PLL circuit simulation, so please let me know if there are any misunderstandings.

Question 1: Are the following settings and measurements appropriate?

Question 2: Case 2 has a frequency divider, but since the beat frequency and output frequency are the same frequency, I'm considering pss+pnoise. Should I choose hb+hbnoise?

Question 3: In the case of a square wave, the Oversample Factor must be set to either 2, 4, or 8, but if the circuit configuration is ideally a square wave, is it okay to treat it as a square wave?  Should I reconsider depending on how distorted the waveform is?

=======================
[SETTING]
=======================
CASE-1 VCO+buf

Target Output: VCOA(1920MHz)

Analyses1: pss
Engine: harmonic balance
Beat Frequency: 1920MHz
Oversample Factor: 1
Oscillator(mode): ON

Analyses2: pnoise

CASE-2 VCO+buf+DIV2

Target Output: VCOB(960MHz)

Analyses1: pss
Engine: harmonic balance
Beat Frequency: 960MHz
Oversample Factor: 2
Oscillator(mode): ON

Analyses2: pnoise

CASE-3 buf+DIV2+DIV2

Target Output: OUTA(960MHz),OUTB(480MHz),OUTC(240MHz)

Analyses1: hb
Tones: Frequencies
Number of Tones: 1
Tone1
   Fundamental Freq: 960MHz
   Number of Harmonics: auto
   Oversample Factor: 2
   Freqdivide Ratio for Tone1: 4
Harmonics: select (10Hz – 10G)
   Method: diamond
   MaximOrder: 5

Analyses2:hbnoise

=======================
[MEASUREMENT]
=======================
CASE-1
   db10((((drpljitter(?result “pnoise_sample_pm0” ?unit “Second” ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData(“/VCOA” ? result “pss_fd”)) ‘1))**2)) /2))

CASE-2
   *replace VCOA of CASE-1 to VCOB

CASE-3
   db10((((drpljitter(?result “hbnoise_sample_hm0” ?unit “Second” ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData(“/OUTA” ? result “hb_fd”)) ‘1))**2)) /2))
   db10((((drpljitter(?result “hbnoise_sample_hm0” ?unit “Second” ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData(“/OUTB” ? result “hb_fd”)) ‘1))**2)) /2))
   db10((((drpljitter(?result “hbnoise_sample_hm0” ?unit “Second” ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData(“/OUTC” ? result “hb_fd”)) ‘1))**2)) /2))

Thanks and Regards,

MOS

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  • ShawnLogan
    ShawnLogan over 1 year ago

    Dear MOS,

    MOS said:
    I spent a lot of time doing phase noise simulations of circuits like CASE-3 with pss+pnoise. I understand that when simulating with pss+pnoise, it is necessary to set the pss beat frequency to 240MHz. The beat frequency of pss and pnoise will automatically be the same value. In order to check the phase noise of OUTB (480MHz), I stopped the circuit operating at 240MHz and set the beat frequency to 480MHz. However, I think this is not a best method. After reading the manual I think it might be better to use hb+hbnoise.

    From your written description and your figure of "CASE-3", it appears your outputs are not sinusoidal in nature. If so, my understanding is you will be more likely to experience less convergence issues using a pss simulation based on the shooting algorithm rather than harmonic balance. This is discussed in the Forum post at URL:

    https://community.cadence.com/cadence_technology_forums/f/rf-design/47663/harmonic-balance-convergence-issue

    where the Forum poster is attempting to run a harmonic balance and a subsequent hbnoise analysis for a clock divider. Of course, if you choose to use the shooting algorithm for the pss stage of the simulation, you must run a pnoise analysis and not an hbnoise analysis to determine the phase noise. Indeed, as you correctly noted, the period for the pss analysis must be set to the lowest frequency in your circuit as this represents the frequency at which all signals will be periodic (for a set of binary dividers).

    You might consider the following method to compute the phase noise of each output:

    community.cadence.com/.../1387336

    MOS said:
    Question 2: Case 2 has a frequency divider, but since the beat frequency and output frequency are the same frequency, I'm considering pss+pnoise. Should I choose hb+hbnoise?

    If neither waveform is sinusoidal, the shooting algorithm is likely to provide a more efficient solution than the harmonic balance algorithm. The harmonic balance algorithm attempts to model the steady-state response using a sum of sinusoids. If your steady-state waveform(s) have relatively fast transition times (relative to their respective period(s)), then the number of sinusoids required to accurately model each is very large. This can lead to convergence issues - which will reduce your simulation efficiency.

    The beat frequency in the pss simulation using the shooting algorithm is the lowest frequency in your circuit, or I believe 960 MHz.

    MOS said:
    Question 3: In the case of a square wave, the Oversample Factor must be set to either 2, 4, or 8, but if the circuit configuration is ideally a square wave, is it okay to treat it as a square wave?  Should I reconsider depending on how distorted the waveform is?

    You might consider reviewing the section on "Oversample Factor" in:

    "Spectre® Circuit Simulator and Accelerated Parallel Simulator RF Analysis in ADE Explorer User Guide", Product Version 21.1, January 2023

    under the "Frequency Domain Analyses: Harmonic Balance" section starting on page 59. it provides a more graphical example of the intuitive response I provided (or tried to anyway!) to your second question regarding when the use of harmonic balance in a pss simulation is recommended or discouraged.

    Shawn

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  • MOS
    MOS over 1 year ago in reply to ShawnLogan

    Thank you for your reply. It helped me a lot. I understood that the phase noise of multiple outputs with different frequencies can be measured with multiple noise of pss+pnoise. I actually performed a simulation of CASE-3.I would like to ask you an additional question. When the beat frequency is set to 240MHz, is the calculation formula for each phase noise correct as shown below? I selected three pnoise multiple noises. The noise type is set to sampled(jitter) and each output node is set to trigger and measurement. I set the harmonic number in the formula to match the frequency of each output.

    [OUTA(960MHz)]
    phaseNoise(4 "pss_fd" ?result "pnoiseOut1_sample_pm0")

    [OUTB(480MHz)]
    phaseNoise(2 "pss_fd" ?result "pnoiseOut2_sample_p2m0")

    [OUTC(240MHz)]
    phaseNoise(1 "pss_fd" ?result "pnoiseOut3_sample_p3m0")

    The unit of the above calculation formula is V/sqrt(Hz) (dBc/Hz). The unit of the calculation formula below is V/sqrt(Hz) (dB). I do not understand the essential meaning of the calculation formula below.I believe that the calculation formula below is "phase angle = jitter (time) * angular frequency", but I need to confirm whether my understanding is correct.

    [OUTA(960MHz)]
    db10((((drpljitter(?result "pnoiseOut1_sample_pm0" ?unit "Second" ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData("/OUTA" ?result "pss_fd")) '4))**2)) /2))

    [OUTB(480MHz)]
    db10((((drpljitter(?result "pnoiseOut2_sample_p2m0" ?unit "Second" ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData("/OUTB" ?result "pss_fd")) '2))**2)) /2))

    [OUTC(240MHz)]
    db10((((drpljitter(?result "pnoiseOut3_sample_p3m0" ?unit "Second" ?k 1 ?event 0)**2 * ((2 * pi * harmonic(xval(getData("/OUTC" ?result "pss_fd")) '1))**2)) /2))

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  • Andrew Beckett
    Andrew Beckett over 1 year ago in reply to MOS

    You've really not given enough information here as to what your setup is or your objectives are.

    You seem to be mixing using pss and pnoise (but with harmonic balance enabled) and then hb/hbnoise. In general the analyses will give the same result (if using hb for both), but using pss/pnoise in harmonic balance mode is not the recommended flow because not all features available with harmonic balance are available that way (the choice is mostly intended for when you need to try switching back and forth between shooting and harmonic balance with the same setup).

    You can use harmonic balance with dividers and square(ish) signals but you typically need lots of harmonics (especially if the frequencies are low), so the benefit may be less apparent and it could be simpler to use shooting in this case.

    I'm not sure why you then suddenly start using sampled pnoise analysis and then using the phaseNoise() function on the results of that. This is just wrong...

    Also, this is wrong:

    ShawnLogan said:
    The beat frequency in the pss simulation using the shooting algorithm is the lowest frequency in your circuit, or I believe 960 MHz.

    From your diagrams, it's 240MHz.

    In general, if you have run PSS with a fundamental frequency of 240MHz, then you'd run a pnoise analysis at the OUTC output with relative harmonic 1. For OUTB, set the relative harmonic to be 2 (in a second pnoise analysis) and so on. The reason you want a separate noise analysis is because you need the noise to be summed at the given frequency range and all the transfer functions to that output and output frequency range to be computed.

    You should be careful when using the phaseNoise function - it's only truly computing phase noise if the output is coming from a "PM" result database (not in your case), and if using the conventional timeaverage choice on the pnoise form, you want either ALL or PM chosen, and use the direct plot afterwards to generate the expression you need. 

    If you want to get jitter (say because the output is driving the clock of some decision-making circuit), then you can indeed use the sampled analyses. However, don't use the phaseNoise function then; there is the edge phase noise on the direct plot form, but again you should use this with care (there are articles on edge phase noise on support.cadence.com which cover this).

    I'm not sure where you got the expressions from at the end - they seem to be trying to convert a jitter in time back to a  phase and then converting to db. Where did these come from? The direct plot form does not (as far as I know) use drpljitter any more (I may have missed that). Which versions of the IC tools and Spectre are you using? (Help->About tells you the IC version, and the Spectre version can be found at the top of the simulation log file).

    Andrew

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  • ShawnLogan
    ShawnLogan over 1 year ago in reply to Andrew Beckett

    Dear Andrew,

    Andrew Beckett said:

    Also, this is wrong:

    ShawnLogan said:
    The beat frequency in the pss simulation using the shooting algorithm is the lowest frequency in your circuit, or I believe 960 MHz.

    From your diagrams, it's 240MHz.

    The comment regarding the lowest frequency being 960 MHz refers to MOS question 2 (note the quoted question from MOS above it). Question 2 refers to Case 2. In Case 2, 960 MHz is the lower of its two frequencies.

    Shawn

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  • Andrew Beckett
    Andrew Beckett over 1 year ago in reply to ShawnLogan
    ShawnLogan said:
    The comment regarding the lowest frequency being 960 MHz refers to MOS question 2 (note the quoted question from MOS above it). Question 2 refers to Case 2. In Case 2, 960 MHz is the lower of its two frequencies.

    My mistake.I missed that it was related to case 2.

    Andrew

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  • ShawnLogan
    ShawnLogan over 1 year ago in reply to ShawnLogan

    Dear MOS,

    I read through Mr. Beckett's responses regarding your expressions. I had started a response to your questions yesterday but did not complete it. One of my concerns, which Mr. Beckett also refers to, is your overall objective. You noted :

    MOS said:
    spent a lot of time doing phase noise simulations of circuits like CASE-3 with pss+pnoise.

    However, the label for the y-axis in the "example" plot you show below your three cases

    is shown as V/√Hz (dB). The units of phase noise are dBc/Hz in accordance with the IEEE definition and not V/√Hz. Between that and your use of sampled jitter in your phaseNoise() function arguments, I am not sure I fully understand your measurement objective. Are you attempting to measure the IEEE defined phase noise of one or more of your outputs or are you trying to measure its sampled voltage noise at some threshold (edge noise)? If you are not sure, you might consider reviewing a few pages that detail the definitions of time interval error based Jee and sampled voltage error. The definitions of these are on pages 36 and 45 of the note at

    Copy and append the following text strings in your favorite browser to add to the prefix:

    s/3m531dl4fl7bwbr/

    jee_computation_example_sml_032823v1p0.pdf?dl=0

    Another possibility is to consider what type of noise you are trying to measure. If it is random noise and your VCO is resonator based (i.e., LC), then consider that it is unusual for digital dividers or a buffer to add significant amounts of random noise. (The dividers and buffers can be significant sources of deterministic jitter.) In that case, perhaps you can use a harmonic balance simulation to determine the phase noise of your fundamental VCO output and translate its random phase noise to the respective divided output using the relationship 20*log10(Fout/Fosc).

    You can determine the impact of supply noise and other deterministic noise sources of your buffers and dividers using a conventional transient or even DC analysis.

    Perhaps if you can state exactly what you are trying to measure, it might allow others to provide some speciific simulation suggestions.

    Shawn

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  • MOS
    MOS over 1 year ago in reply to Andrew Beckett

    Dear Andrew

    Thank you for your reply. Please let me explain the background of my question. When I verified the phase noise of a circuit like CASE-3, I used the testbench used in the old product as a base. There are three types of output frequencies. In old products, in order to match the pnoise beat frequency to the target(carrier) output frequency, it chose a method of stopping circuits with frequencies slower than the target frequency. We had to prepare three types of circuits and layouts for verification, and perform verification three times. For example, when checking the phase noise of OUTB (480MHz), stop some circuit operating at 240MHz. After running the simulation, a graph (unit:V/sqrt(Hz) (dB)) was generated using a calculation formula using drpljitter with db10(). The calculation formula using drpljitter was used in the testbench of the old product. Basically, our policy is to perform verification using the same method as the old product, so I used drpljitter this time as well. However, I thought there might be a more appropriate method than the old product verification method, so I started researching it. I found phaseNoise(). I looked at the name of this function and assumed that it was a better function than drpljitter for measuring phase noise (this is just my lack of understanding). It seems that the content of the question has become strange because I modified the testbench of an old product without understanding the relationship between timeaverage, sampled(jitter), and phaseNoise(). I think drpljitter is a remnant from an old product. I was rewriting the calculation formula directly in the outputs settings, but it seems that I need to understand in which settings to use the direct plot form. Currently I am using the following version.

    *IC6.1.8
    *spectre 19.1

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  • MOS
    MOS over 1 year ago in reply to Andrew Beckett

    Dear Andrew

    Thank you for your reply. Please let me explain the background of my question. When I verified the phase noise of a circuit like CASE-3, I used the testbench used in the old product as a base. There are three types of output frequencies. In old products, in order to match the pnoise beat frequency to the target(carrier) output frequency, it chose a method of stopping circuits with frequencies slower than the target frequency. We had to prepare three types of circuits and layouts for verification, and perform verification three times. For example, when checking the phase noise of OUTB (480MHz), stop some circuit operating at 240MHz. After running the simulation, a graph (unit:V/sqrt(Hz) (dB)) was generated using a calculation formula using drpljitter with db10(). The calculation formula using drpljitter was used in the testbench of the old product. Basically, our policy is to perform verification using the same method as the old product, so I used drpljitter this time as well. However, I thought there might be a more appropriate method than the old product verification method, so I started researching it. I found phaseNoise(). I looked at the name of this function and assumed that it was a better function than drpljitter for measuring phase noise (this is just my lack of understanding). It seems that the content of the question has become strange because I modified the testbench of an old product without understanding the relationship between timeaverage, sampled(jitter), and phaseNoise(). I think drpljitter is a remnant from an old product. I was rewriting the calculation formula directly in the outputs settings, but it seems that I need to understand in which settings to use the direct plot form. Currently I am using the following version.

    *IC6.1.8
    *spectre 19.1

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