• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Virtuoso adexl relxpert aging simulation is disabled

Stats

  • Locked Locked
  • Replies 0
  • Subscribers 125
  • Views 3841
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Virtuoso adexl relxpert aging simulation is disabled

Holz
Holz over 1 year ago

Hi,

I'm current running aging simulation in virtuoso. When I use adel, after running a 0.5-year DC stress simulation on an inverter, I can observe vth shift due to aging in a .ba0 file. 

However, after I switch to adexl, the relxpert simulation is somehow disabled. After I run the simulation, I check the netlist folder of the stress test. The stress simulation is somehow not conducted, I can only find the fresh netlist. And here is the .ba0 file

I don't know what is wrong here, since with adel I can simulate and the PDK aging file I'm using is right. My virtuoso version is 6.1.8, thanks for help!

Best,

Holz

  • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information