Stats

Locked Locked
Replies 3
Subscribers 125
Views 4843
Members are here 0

This discussion has been locked.

You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Issue using vpwl

I want to create a linear ramp with the vpwl source and transient analysis.

I did set the pairs (Time 1 = 0s, Voltage 1 = 0s) and (Time 2 = 1us, Voltage 2 = 1V) and I expect a linear ramp from the first pair to the second pair. I measure the voltage at the positive terminal of the vpwl source.

Problem: The source does not ramp, the measured voltage remains at 0V.

Spectre Version: 21.1.0.460.isr10 64bit

Virtuoso Version: IC6.1.8-64b.500.27

Simulation Setup

spatz over 1 year ago

I did change the source from vpwl to vsource (type:pwl) and now it works as expected.
Cancel
Vote Up 0 Vote Down

Cancel
Andrew Beckett over 1 year ago in reply to spatz

That's odd. Can you show what the input netlist (input.scs) is with vpwl being used?

Regards,

Andrew
Cancel
Vote Up 0 Vote Down

Cancel
spatz over 1 year ago in reply to Andrew Beckett

I cannot replicate the issue described above.

The testbench with vpwl source is working now too.

¯\_(ツ)_/¯
Cancel
Vote Up 0 Vote Down

Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.