How to include bidirectional signals in VCD files

Dear community

I use VCD files in my ADE Explorer test bench to drive some of the digital signals. One signal is a bidirectional data bus, which I will simply call databus<5:0>. The test bench consists of two phases. In the first phase, databus<5:0> is used as input to load some bits into the circuit's internal register. In the second phase, the circuit uses databus<5:0> as output.

Phase 1 works well in my test bench, but in phase 2, I cannot see any change on databus<5:0>. I suppose the problem is that the VCD file continuously drives databus<5:0> in its last state.

Is it possible to "release" a signal after some time? How can I include bidirectional signals?

Below is a (simplified) snipplet of my .info and .vcd file:

info file