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  3. Port order in symbol view and systemverilog view

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Port order in symbol view and systemverilog view

SimhanAnalog
SimhanAnalog 11 months ago

When I check & save a systemverilog view it asks for option to create symbol view. When selected it creates a symbol view. But the port order in the symbol view gui doesnt match that of systemverilog. In symbol view gui it always sorts in alphabetical order.

example

module some_module

(

output [2:0] o_c,

output [1:0] o_a,

output [6:0] o_b,

input [3:0] i_xy,

input [2:0] i_ab,

input [5:0] i_gh

);

endmodule

The symbol order looks like below

_________________

|   i_ab             o_a   |

|   i_gh             o_b   |

|   i_xy             o_c   |

|________________|

But I want the symbol to look like the order that I have in systemverilog like below

_________________

|   i_xy             o_c   |

|   i_ab             o_a   |

|   i_gh             o_b   |

|________________|

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  • Andrew Beckett
    Andrew Beckett 11 months ago

    If there's no symbol, you can always choose not to create the symbol when prompted having pressed the "Build a database of instances..." icon (aka "check-and-save"). Then use: Create→Cellview from Cellview and in the resulting form ensure that "Edit Options" is checked (it normally is by default), and the Tool/Data Type set to "schematicSymbol" (and of course the view name as Symbol):

    Then on the next form you can adjust the pin order:

    resulting in:

    Andrew

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    Thanks Andrew.

    If I just want to match the order in the systemverilog file isn't there a simpler way to do it. If I have more than 500 inputs and output ports, it would be quite annoying to do this manually.

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    Thanks Andrew.

    If I just want to match the order in the systemverilog file isn't there a simpler way to do it. If I have more than 500 inputs and output ports, it would be quite annoying to do this manually.

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  • Andrew Beckett
    Andrew Beckett 11 months ago in reply to SimhanAnalog

    I think I could write some simple SKILL code to do this. Let me think about it - there's nothing built in to do it though.

    Andrew 

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    Thanks that will be helpful.

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  • Andrew Beckett
    Andrew Beckett 11 months ago in reply to SimhanAnalog

    This SKILL code provides a function (which you can also add a menu in the Create menu in the systemVerilog editor too to make it easier) to create the symbol from the pin order:

    /* abCreateSymbolFromPortOrder.ils
    
    Author     A.D.Beckett
    Group      Custom IC (UK), Cadence Design Systems Ltd.
    Language   SKILL
    Date       Sep 11, 2024 
    Modified   Sep 12, 2024 
    By         A.D.Beckett
    
    Create a symbol based on the pin order in (say) a systemVerilog view.
    Note that the "build a database" icon or File->Extract must have been run
    first.
    
    The file should keep the .ils suffix as it uses SKILL++ semantics.
    
    Can either be called from SKILL using:
    
    abCreateSymbolFromPortOrder(
        ?libName "libName" ?cellName "cellName" ?viewName "systemVerilog"
    )
    
    Uses the template from envGetVal("schematic" "tsgTemplateType")
    
    Or you can call:
    
    abRegCreateSymbolFromPortOrderMenu()
    abRegCreateSymbolFromPortOrderMenu(?viewType "text.v")
    
    If you're unsure of the viewType, open the application and type:
      deGetViewType(hiGetCurrentWindow())
    
    to add a new menu item in the Create menu to do this. 
    
    ***************************************************
    
    SCCS Info: @(#) abCreateSymbolFromPortOrder.ils 09/12/24.09:10:20 1.2
    
    */
    
    /****************************************************************
    *                                                               *
    *                 (abCreateSymbolFromPortOrder                  *
    * [?libName libName] [?cellName cellName] [?viewName viewName]  *
    *    [?symbolViewName "symbol"] [?tsgTemplateType "default"]    *
    *                               )                               *
    *                                                               *
    *  Uses the portOrder property on a cellView to drive the text  *
    * to symbol generator. This allows a symbol to be created with  *
    *   the same pinOrder as a text view (such as SystemVerilog).   *
    *                                                               *
    * By default the view is called "symbol", and the template used *
    *  for the symbol is from the schematic/tsgTemplateType cdsenv  *
    *                           variable.                           *
    *                                                               *
    ****************************************************************/
    
    (defun abCreateSymbolFromPortOrder (@key libName cellName viewName 
                                             (symbolViewName "symbol")
                                             (tsgTemplateType envGetVal("schematic" "tsgTemplateType"))
                                             verbose)
      (letseq (
               (cvId (dbOpenCellViewByType libName cellName viewName))
               (tsgFileName (makeTempFileName (strcat (getTempDir) "/tsgFile")))
               (templateFile (cadr (assoc tsgTemplateType (inSkill tsgTemplateMasters))))
               (tsgFile (outfile tsgFileName))
               portOrder inputs outputs inouts symbolCvId
               )
        (unwindProtect
          (progn
            (setq portOrder (getq cvId portOrder))
            (unless portOrder
              (error "Cannot find portOrder on cellView %Y/%Y/%Y\n" libName cellName viewName))
            (unless tsgFile
              (error "Cannot write TSG input file %s\n" tsgFile))
            (when verbose
              (printf "Port order is %L\n" portOrder))
            (setq inputs (setof port portOrder 
                                (equal (getq (dbFindTermByName cvId port) "direction")
                                       "input")))
            (setq outputs (setof port portOrder 
                                 (equal (getq (dbFindTermByName cvId port) "direction")
                                        "output")))
            (setq inouts (setof port portOrder 
                                (equal (getq (dbFindTermByName cvId port) "direction")
                                       "inputOutput")))
            (fprintf tsgFile "defcell(\"%s\"\n" cellName)
            (foreach (pinType pinList) '("input" "output" "io") (list inputs outputs inouts)
                     (fprintf tsgFile "  %s(\n" pinType)
                     (foreach pin (if (equal pinType "io") pinList (reverse pinList))
                              (fprintf tsgFile "    \"%s\"\n" pin))
                     (fprintf tsgFile "  )\n")
                     )
            (fprintf tsgFile "  defsymbol(\"%s\")\n" symbolViewName)
            (fprintf tsgFile ")\n")
            (close tsgFile)
            (tsg libName tsgFileName templateFile)
            (deleteFile tsgFileName)
            ;----------------------------------------------------------------
            ; Update the portOrder (much as I hate portOrder!) on the symbol view so
            ; that the cross-view check from the systemVerilog editor detects that the
            ; pins have changed
            ;----------------------------------------------------------------
            (setq symbolCvId (dbOpenCellViewByType libName cellName symbolViewName "" "a"))
            (when symbolCvId
              (dbReplaceProp symbolCvId "portOrder" "ILList" portOrder)
              (dbSave symbolCvId)
              (dbClose symbolCvId)
              )
            t
            )
          ;------------------------------------------------------------------
          ; Cleanup anything open if something failed
          ;------------------------------------------------------------------
          (progn
            (when cvId (dbClose cvId))
            (when (openportp tsgFile) 
              (close tsgFile)
              (deleteFile tsgFileName))
            )
          )
        ))
    
    /******************************************************************
    *                                                                 *
    *               (abCreateSymbolFromPortOrderMenuCB)               *
    *                                                                 *
    * A callback function for a menu to be added into the Create menu *
    * in a text editor application, which retrieves the cellView info *
    *     and then calls the abCreateSymbolFromPortOrder function     *
    *                                                                 *
    ******************************************************************/
    
    (defun abCreateSymbolFromPortOrderMenuCB ()
      ;----------------------------------------------------------------------
      ; In text editor apps, cellView is the ddId; in schematic app
      ; it's the dbId. Handle both just in case!
      ;----------------------------------------------------------------------
      (letseq ((win (hiGetCurrentWindow))
               (cellView (getq win cellView))
               (libName (getq (getq cellView lib) name))
               (cellName (getq (getq cellView cell) name))
               (viewName (or (getq cellView name) (getq cellView viewName)))
               )
        (abCreateSymbolFromPortOrder
          ?libName libName
          ?cellName cellName
          ?viewName viewName)))
    
    /***************************************************************
    *                                                              *
    *             (abRegCreateSymbolFromPortOrderMenu              *
    *    [?viewType "systemVerilogText"] [?menuMatch "Create"]     *
    *                              )                               *
    *                                                              *
    * Create the menu in the application each time the application *
    *                          is opened                           *
    *                                                              *
    ***************************************************************/
    
    (defun abRegCreateSymbolFromPortOrderMenu (@key (viewType "systemVerilogText") (menuMatch "Create"))
      ;----------------------------------------------------------------------
      ; Lexically scoped function which can retrieve the menuMatch arg
      ;----------------------------------------------------------------------
      (defglobalfun abCreateSymbolFromPortOrderPostInstallTrigger (args)
        (let ((bannerMenus (hiGetBannerMenus (getq args window))) 
              (menuPattern (pcreCompile menuMatch))
              createMenu)
          (setq createMenu
                (car (exists menu bannerMenus (pcreExecute menuPattern (getq (symeval menu) _menuTitle)))))
          (when createMenu
            (setq createMenu (symeval createMenu))
            (unless (getq createMenu createFromPortOrder)
              (hiAddMenuItem
                createMenu
                (hiCreateMenuItem 
                  ?name 'createFromPortOrder
                  ?itemText "Create Symbol From Port &Order"
                  ?callback "abCreateSymbolFromPortOrderMenuCB()"
                  ))))
          t
          ))
      ;----------------------------------------------------------------------
      ; Register the trigger to add the menu
      ;----------------------------------------------------------------------
      (deRegUserTriggers viewType nil nil 'abCreateSymbolFromPortOrderPostInstallTrigger)
      )

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    Thanks a lot Andrew. Really appreciate your enthusiasm to help over the years.

    I tried the skill command  abCreateSymbolFromPortOrder and it works well.

    Only issue I found is that if I generate symbol view using this command and then I update the systemverilog view(like add/delete/modify some ports) and do Check&Save("build a database"), it doesnt give a popup that symbol needs to be updated. It shows that there is a port mismatch for other views like schematic. When we generate symbol using the conventional method this issue is not there.

    Looks like though the symbol view is part of the cell, it doesnt seem to be bound to the other views. And any warnings that generally comes when some view is updated doesnt come for this symbol view. Can you look into this and address it.

    I mean when I run vmsUpdateCellViews(?lib lib_name_d, ?cell module_name, ?view "systemVerilog", ?viewt "systemVerilogText") it gives any mismatch with other views(including symbol view if symbol was generated using conventional approach). If symbol was generated using your script it doesnt show any mismatch if systemVerilog view got updated.

    Thanks

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  • Andrew Beckett
    Andrew Beckett 11 months ago in reply to SimhanAnalog
    SimhanAnalog said:
    Looks like though the symbol view is part of the cell, it doesnt seem to be bound to the other views. And any warnings that generally comes when some view is updated doesnt come for this symbol view. Can you look into this and address it.

    That's not what the issue was. The problem is that the Check & Save doesn't actually check the terminals in the other views but relies on checking the portOrder property (which is not compulsory, and in fact is not really needed in most flows - certainly not on the symbol view). When creating a symbol the conventional way, it does copy the portOrder across, but in my code it was not doing that.

    I've updated the code (in the post above, so there's only one copy of the code) to fix two things:

    1. The pin order was wrong in the symbol if you had more than one inout pin (I realised this early this morning on my drive into work)
    2. It now copies the portOrder property across

    With this update, you will get the popup if the pins change. Note that if you do check the box to regenerate the symbol that will do so using the standard symbol generator, so rather than that you should use the menu again (if you added the menu). I haven't made the code alert you to the fact that you are overwriting an existing symbol or anything like that - I decided to keep it simple.

    In addition, I'll file a Cadence Change Request to have the text editors actually check the terminals and not just rely on portOrder.

    Regards,

    Andrew

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    Thanks for the quick fix. inout pins we don't use for this systemverilog use case. I observed one more difference between the standard symbol generator and your script. There seems to be more properties for the "symbol pin(the red square for the pin)" in the standard symbol generator when compared to yours. Not sure if it really matters. My use case is that we will first generate symbol using your script and then for any updates on ports we will use the standard symbol generator since it has the modify option(so that the user gets to decide where the update goes rather than messing their existing symbol). But in that case due to this property difference I see a big message in the changed section like below. This is not a major concern for us as long as it doesn't screw something else.

    But one thing that I would really like is to check for existing symbol and give a popup message asking whether to replace/modify(which can then call the standard symbol gen with modify option)/cancel. I know I am asking for a lot. But I am not a gui/software designer and figuring out these things as creating a simple popup with options is taking a lot of time.

    " Added cellview properties:
    verilogFormatProc modelName
    Changed cellview properties:
    portOrder
    Terminals with added properties:
    o_rb_rdata<7:0> o_scan_out ....

    ................................................."

    Standard symbol generator

    Your script

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  • Andrew Beckett
    Andrew Beckett 11 months ago in reply to SimhanAnalog

    Those properties on the pin really shouldn't matter (nor should the other cellView property). It's just that the standard mechanism for creating a view from another view captures these, mostly so that you  create another SystemVerilog view from this one it will preserve the data types etc. There's no requirement for the symbol pins to have these properties (after all, a manually created symbol would not have them).

    As for a UI to offer the option of Replace/Modify - I started looking into it and it gets a bit messy and would rely on some private functions to do it properly. I could (if I have time at some point) add a dialog box to Replace/Use standard symbol generation/Cancel if the symbol already exists. The Use standard would bring up the normal View to View form (so you'd get a second replace/modify dialog box). Anything beyond that would get quite a bit more complicated (and I really don't have the time to do that right now; I answer here in my spare time). Similarly updating it to preserve the pin properties (which isn't really necessary) would also require some internal functions to do properly and isn't strictly necessary.

    I will plan to find some time to at least give you the choice to replace or not (or maybe use the standard symbol generation flow) - but that might not be for a few days (depending on how things pan out)

    Andrew

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    Thanks. Not an issue. The things you have suggested is of great help and good enough for now. We will let you know if we are not able to get the replace/modify/cancel option.
    One thing that can help is if you could figure out the backend api command that gets called when pressing modify(in the std symbol gen flow). We couldn't find it in the cds log file which generally prints the commands that get run on pressing library gui. Probably that is what is troubling you as well(when you said it gets a bit messy :) ).

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  • Andrew Beckett
    Andrew Beckett 11 months ago in reply to SimhanAnalog

    The issue is that the APIs needed are private (I know what happens within the code, since I can see that), so directly invoking the "Modify" mode is challenging because of that (and the fact that they are private means there's a risk of the APIs changing and code using them might break - which is why we don't advertise private APIs).

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  • SimhanAnalog
    SimhanAnalog 11 months ago in reply to Andrew Beckett

    ok. Thanks.
    To create/update symbol using standard approach from systemVerilog view we run
    schViewToView(Libname cell_name Libname cell_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")

    This gives the pupup with replace/modify/cancel options. Is there a command line argument or command to bypass this popup and select modify automatically? That should also work right?

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