• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
  3. Virtuoso Hierarchy Editor unable to find primitive resistor...

Stats

  • Locked Locked
  • Replies 3
  • Subscribers 125
  • Views 878
  • Members are here 0
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Virtuoso Hierarchy Editor unable to find primitive resistor/capacitor/inductor

Nett
Nett 6 months ago

Hey everybody,

I'm having trouble getting Virtuoso Hierarchy Editor to remember what a primitive resistor/capacitor/inductor is.  These are vams cells that have previously compiled, but due to some unknown change in setup/software version are no longer accepted by the editor.

Any idea what might cause this/ what needs to be defined for the editor to understand the primitives?

Below is an image of the error.  When this same model was working correctly, none of these Capacitors/Resistors/Inductors were visible from the hierarchy editor as instances.

  • Cancel
  • Andrew Beckett
    Andrew Beckett 6 months ago

    OK, these cells seem to be "Resistor", "Capacitor", "Inductor" (with an initial uppercase letter). Are there cells for these in a library? If so, try adding that library name to the library list in the config (top right of the hierarchy editor).

    Andrew

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Nett
    Nett 6 months ago in reply to Andrew Beckett

    Thanks Andrew,

    I tried re-compiling everything with lowercase names, and that didn't seem to restore the primitives.

    These aren't specific cells that I'm trying to call.  I was hoping to just use the "resistor" "inductor" and "capacitor" primitive definitions/ that are baked into the vams language. 

    In previous projects, this code seems to have worked.  Is there some setting/definition that I have unintentionally set that would make the compiler start looking for cells instead of the primitives?

    • Cancel
    • Vote Up 0 Vote Down
    • Cancel
  • Andrew Beckett
    Andrew Beckett 6 months ago in reply to Nett

    I think it would need a definition of Resistor or Capacitor as these are not the built-in primitives (resistor and capacitor are). Anyway, I think these wouldn't cause a problem in practice since they will be bound inside the simulator. That said, to prevent netlisting failing, you might need to set:

    hnlInvalidBindingAction="ignore"

    in the .cdsinit/.simrc (or type in the CIW).

    Better might just be to add this to your cds.lib:

    DEFINE sample $(inst_root_with:tools/dfII/bin/virtuoso)/tools/dfII/samples/cdslib/sample

    and then open the verilogams view and hit the "build a database" icon (the "check and save"). The shadow database would then find these cells in the sample library, which would prevent the errors in HED (you might need to recompute the hierarchy in HED to clear the errors).

    Andrew

    • Cancel
    • Vote Up +1 Vote Down
    • Cancel

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information