Can't find documentation on Spectre warnings SFE-83 and SFE-47

Is this with Spectre or AMS? I see more reports of similar issues with AMS than Spectre - some with Spectre but they were SFE-81 rather than SFE-83. What version of Spectre are you using?

Tne best way to handle this is to first ensure you're using current versions and then if the problem still occurs to contact customer support (use the Case menu to submit a support case). Almost certainly we'd need to see the specific data to understand and reproduce this.

Regards,

Andrew

This is using Spectre 23.1.0.

I wasn't looking specifically for a solution for my problem, but I was trying to get a better explanation of the errors so I can learn to debug such problems myself. Really just trying to find out if I had missed some documentation - I assume there was at some point documentation on error messages (after all, someone coded these error messages into the software) but possibly it is lost in the mists of time and all I'm left with is an error number and cryptic message.

In the meantime I re-structured my model for the third time. First version crashed Spectre with a segmentation fault (customer support can recreate the problem with multiple Spectre versions but can't explain/fix). Second version (where I broke the model into two levels of hierarchy) is the one I posted about. Third version (back to a single layer after I figured out how to declare nodes inside a for loop) seems to be working.

The messages indicate that there are fewer connections on the instance than in the definition of the sub-module. I think the messages are pretty clear...

If that's not the case, this should be looked at with customer support, as I said.

Andrew

They were clear but did not match what was in the verilog-a model. The number of ports in the model matched exactly and was not euqal to the number reported by Spectre in the error message.  I just wanted to make sure that the "clear" error message didn't actually mean something else.

I also wonder that port mismatch only warrants a warning rather than an error, it seems pretty fundamental issue. It certainly was giving me unpredictable results.

They were clear but did not match what was in the verilog-a model. The number of ports in the model matched exactly and was not euqal to the number reported by Spectre in the error message.  I just wanted to make sure that the "clear" error message didn't actually mean something else.

I also wonder that port mismatch only warrants a warning rather than an error, it seems pretty fundamental issue. It certainly was giving me unpredictable results.

The number of ports in Verilog-A (and Verilog) doesn't have to match - you can indeed have floating ports. An error would prevent that. Of course, the risk with Verilog-A is that floating nodes could lead to simulation issues, but they may not if it is (say) a well-driven voltage output. If this was being incorrectly reported, then (as I said) customer support would be the way to go to ensure that this is either explained (having seen the scenario) or fixed (if it genuinely is wrong, which it certainly could be).

Andrew