Spectre simulation ERROR, convergence issue

Hi all,

I am beginner in Cadence. I am trying a Verilog A code - Spectre, for creating a Memristor model. But I am getting the following error, where I am using a custom input of ramp signal(which I made a model also),

Spectre (R) Circuit Simulator
Version 20.1.0.231.isr6 64bit -- 2 May 2021
Copyright (C) 1989-2021 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence and Spectre are registered trademarks of Cadence Design Systems, Inc. All others are the property of their respective holders.

Includes RSA BSAFE(R) Cryptographic or Security Protocol Software from RSA Security, Inc.

User: samrat   Host: cif2.iitpkd.ac.in   HostID: 800A3203   PID: 128701
Memory  available: 1.0621 GB  physical: 67.0152 GB
Linux   : Red Hat Enterprise Linux release 8.10 (Ootpa)
CPU Type: 12th Gen Intel(R) Core(TM) i7-12700
        Socket: Processors [Frequency] (Hyperthreaded Processor)
        0:       0 [4580.5] (  1 ),  1 [2100.0] (),  2 [2100.0] (  3 )
                 3 [2100.0] (),  4 [2100.0] (  5 ),  5 [2100.0] (),  6 [2100.0] (  7 )
                 7 [4578.5] (),  8 [2100.0] (  9 ),  9 [4572.0] (), 10 [4729.6] ( 11 )
                11 [2100.0] (), 12 [4480.4] ( 13 ), 13 [2100.0] (), 14 [4487.5] ( 15 )
                15 [2100.0] (), 16 [2100.0] (), 17 [2100.0] (), 18 [2100.0] (), 19 [2100.0] ()
        
System load averages (1min, 5min, 15min) : 7.3 %, 10.2 %, 8.6 %
Hyperthreading is enabled
HPC is enabled


Simulating `input.scs' on cif2.iitpkd.ac.in at 12:50:16 PM, Thur Feb 27, 2025 (process id: 128701).
Current working directory: /home/samrat/simulation/Mem_ckt/spectre/schematic/netlist
Command line:
    /home/install/SPECTRE201/tools.lnx86/bin/spectre -64 input.scs  \
        +escchars +log ../psf/spectre.out -format psfxl -raw ../psf  \
        +aps +lqtimeout 900 -maxw 5 -maxn 5 -env ade

Licensing Information:
[12:50:16.274297] Configured Lic search path (20.02-p002): 5280@c2s.cdacb.in

Licensing Information:
[12:50:17.031458] Periodic Lic check successful

Loading /home/install/SPECTRE201/tools.lnx86/cmi/lib/64bit/5.0/libinfineon_sh.so ...
Loading /home/install/SPECTRE201/tools.lnx86/cmi/lib/64bit/5.0/libphilips_o_sh.so ...
Loading /home/install/SPECTRE201/tools.lnx86/cmi/lib/64bit/5.0/libphilips_sh.so ...
Loading /home/install/SPECTRE201/tools.lnx86/cmi/lib/64bit/5.0/libsparam_sh.so ...
Loading /home/install/SPECTRE201/tools.lnx86/cmi/lib/64bit/5.0/libstmodels_sh.so ...
Reading file:  /home/samrat/simulation/Mem_ckt/spectre/schematic/netlist/input.scs
Reading file:  /home/install/SPECTRE201/tools.lnx86/spectre/etc/configs/spectre.cfg
Reading file:  /home/samrat/Cadence_memristor/Memristor/Mem_model/veriloga/veriloga.va
Reading file:  /home/install/SPECTRE201/tools.lnx86/spectre/etc/ahdl/constants.vams
Reading file:  /home/install/SPECTRE201/tools.lnx86/spectre/etc/ahdl/disciplines.vams
Reading file:  /home/samrat/Cadence_memristor/Memristor/V_ramp/veriloga/veriloga.va
Time for NDB Parsing: CPU = 42.298 ms, elapsed = 1.56694 s.
Time accumulated: CPU = 87.189 ms, elapsed = 1.56694 s.
Peak resident memory used = 105 Mbytes.

Existing shared object for module Mem_model is up to date.
Installed compiled interface for Mem_model.
Existing shared object for module V_ramp is up to date.
Installed compiled interface for V_ramp.
Time for Elaboration: CPU = 10.855 ms, elapsed = 10.8888 ms.
Time accumulated: CPU = 98.097 ms, elapsed = 1.57788 s.
Peak resident memory used = 113 Mbytes.


Warning from spectre during hierarchy flattening.
    WARNING (SPECTRE-17101): The value 'psf' specified for the 'checklimitdest' option will no longer be supported in future releases. Use 'spectre -h' to see other recommended values for the 'checklimitdest' option.


Time for EDB Visiting: CPU = 242 us, elapsed = 241.995 us.
Time accumulated: CPU = 98.405 ms, elapsed = 1.57819 s.
Peak resident memory used = 114 Mbytes.


Notice from spectre during initial setup.
    Ignorevaref=yes is ignored since all nodes are connected to Verilog-A modules.
    Multithreading is disabled due to the size of the design being too small.


Global user options:
         psfversion = 1.4.0
            vabstol = 1e-06
            iabstol = 1e-12
               temp = 27
               gmin = 1e-12
             rforce = 1
           maxnotes = 5
           maxwarns = 5
             digits = 5
               cols = 80
             pivrel = 0.001
           sensfile = ../psf/sens.output
     checklimitdest = psf
               save = allpub
             reltol = 0.001
               tnom = 27
             scalem = 1
              scale = 1

Scoped user options:

Circuit inventory:
              nodes 2
          Mem_model 1     
           resistor 1     
             V_ramp 1     

Analysis and control statement inventory:
               info 7     
               tran 1     

Output statements:
             .probe 0     
           .measure 0     
               save 1     


Notice from spectre during initial setup.
    APS enabled.

Time for parsing: CPU = 1.357 ms, elapsed = 147.152 ms.
Time accumulated: CPU = 99.794 ms, elapsed = 1.72537 s.
Peak resident memory used = 116 Mbytes.

~~~~~~~~~~~~~~~~~~~~~~
Pre-Simulation Summary
~~~~~~~~~~~~~~~~~~~~~~
~~~~~~~~~~~~~~~~~~~~~~

**********************************************
Transient Analysis `tran': time = (0 s -> 4 s)
**********************************************
Matrix is singular (detected at `I0.ion').
Trying `homotopy = gmin' for initial conditions.
Matrix is singular (detected at `I0.ion').
Trying `homotopy = source' for initial conditions.
Matrix is singular (detected at `I0.fil').
Trying `homotopy = dptran' for initial conditions.
Matrix is singular (detected at `I0.ion').
Matrix is singular (detected at `I0.fil').
.
Matrix is singular (detected at `I0.ion').
Trying `homotopy = ptran' for initial conditions.
Matrix is singular (detected at `I0.fil').

Error found by spectre during IC analysis, during transient analysis `tran'.
    ERROR (SPECTRE-16080): Cannot print DC solution because DC did not converge. Resolve the convergence issue and rerun the simulation.
         

The values for those nodes that did not converge on the last Newton iteration are given below.  The manner in which the convergence criteria were not satisfied is also given.
            Failed test: | Value | > RelTol*Ref + AbsTol

 Top 10 Solution too large Convergence failure:
    V(I0.n_fil) = 0 V
        update too large:  | 6.33963 V | > 0 V + 1 uV
    V(I0.n_ac) = 0 V
        update too large:  | -6.33963 V | > 0 V + 1 uV
    V(I0.ion) = 0 V
        update too large:  | 6.33963 V | > 0 V + 1 uV
    V(I0.fil) = 0 V
        update too large:  | 6.33963 V | > 0 V + 1 uV
    V(I0:fil_filAtu_probe) = 0 V
        update too large:  | 6.33963 V | > 0 V + 1 uV
    I(I0:fil_filAtu_flow) = 0 A
        update too large:  | -5.68985 uA | > 0 A + 1 pA
    I(I0:filAtu_be_flow) = 0 A
        update too large:  | -5.67889 uA | > 0 A + 1 pA
    I(I1:vout_gnd_flow) = 0 A
        update too large:  | -4.31595 pA | > 0 A + 1 pA
 Top 10 Residue too large Convergence failure:
    I(I0:track_gap_gnd_flow) = 0 A
        residue too large: | 20 V | > 100 mV + 1 uV
    V(I0:idt0) = 0 V
        residue too large: | 10 mV | > 50 uV + 1 uV
    V(I0.filAtu) = 0 V
        residue too large: | -4.20477 pA | > 21.0238 fA + 1 pA
    V(out) = 0 V
        residue too large: | 4.20477 pA | > 21.0238 fA + 1 pA

DC simulation time: CPU = 737 us, elapsed = 741.959 us.
Analysis `tran' was terminated prematurely due to an error.
finalTimeOP: writing operating point information to rawfile.

Opening the PSF file ../psf/finalTimeOP.info ...

Error found by spectre during DC analysis, during info `finalTimeOP'.
    ERROR (SPECTRE-16041): The `finalTimeOP' analysis is skipped due to inability to compute operating point. Run 'mmsimpack' (see mmsimpack -h for detailed usage information) to package the netlist and log files as a compressed tar file. Then, contact your Cadence representative or submit a service request via Cadence Online Support, including the tar file and any other information that could help identify the problem.

Analysis `finalTimeOP' was terminated prematurely due to an error.
modelParameter: writing model parameter values to rawfile.

Opening the PSF file ../psf/modelParameter.info ...
element: writing instance parameter values to rawfile.

Opening the PSF file ../psf/element.info ...
outputParameter: writing output parameter values to rawfile.

Opening the PSF file ../psf/outputParameter.info ...
designParamVals: writing netlist parameters to rawfile.

Opening the PSFASCII file ../psf/designParamVals.info ...
primitives: writing primitives to rawfile.

Opening the PSFASCII file ../psf/primitives.info.primitives ...
subckts: writing subcircuits to rawfile.

Opening the PSFASCII file ../psf/subckts.info.subckts ...
Licensing Information:
Lic Summary:
[12:50:17.236666] Cdslmd servers:5280@c2s.cdacb.in
[12:50:17.236683] Feature usage summary:
[12:50:17.236683] Virtuoso_Multi_mode_Simulation


Aggregate audit (12:50:17 PM, Thur Feb 27, 2025):
Time used: CPU = 111 ms, elapsed = 1.75 s, util. = 6.35%.
Time spent in licensing: elapsed = 1.09 s, percentage of total = 62.6%.
Peak memory used = 119 Mbytes.
Simulation started at: 12:50:16 PM, Thur Feb 27, 2025, ended at: 12:50:17 PM, Thur Feb 27, 2025, with elapsed time (wall clock): 1.75 s.
spectre completes with 2 errors, 1 warning, and 4 notices.

Can anyone, help me to debug the error.

My input is following,

// VerilogA for Memristor, V_ramp, veriloga

`include "constants.vams"
`include "disciplines.vams"


module V_ramp(vout, gnd);
    electrical vout, gnd;
    
    parameter real period = 4.0;    // Full cycle duration (4 sec)
    parameter real amplitude = 1.0; // Peak voltage level
    real time_offset;
    
    analog begin
        time_offset = $abstime % period;  // Get time within the cycle
        
        if (time_offset < period / 4) begin
            // Phase 1: Ramp from 0V to 1V
            V(vout, gnd) <+ amplitude * (time_offset / (period / 4));
        end
        else if (time_offset < period / 2) begin
            // Phase 2: Ramp from 1V to 0V
            V(vout, gnd) <+ amplitude * (2 - (time_offset / (period / 4)));
        end
        else if (time_offset < 3 * period / 4) begin
            // Phase 3: Ramp from 0V to -1V
            V(vout, gnd) <+ -amplitude * ((time_offset - period / 2) / (period / 4));
        end
        else begin
            // Phase 4: Ramp from -1V to 0V
            V(vout, gnd) <+ -amplitude * (4 - (time_offset / (period / 4)));
        end
    end
endmodule

And my Verilog A, memristor code is following,

// VerilogA for memristor_lib_trial, memristor_cell_trial, veriloga
    // Bipolar resistive switching model (1D) S. Menzel et.al, [doi:10.1063/1.3673239]
    // Based on Butler-Volmer ionic current equation, And Simmons Tunneling model [https://doi.org/10.1063/1.1702682]
    // Using current limiter resistance, for IV characteristics
`include "constants.vams"
`include "disciplines.vams"

module Mem_model(te, be);
    inout te, be;
    ground gnd;
    electrical te, be, ion, fil, filAtu, track_gap, n_fil, n_ac;
    
    // constants values
    localparam e = 1.60e-19;                 // lectronic charge [C]
    localparam kb = 1.381e-23;            // Boltzman constant [J/K]
    localparam h = 6.626e-34;                // Planks constant [Js]
    localparam pi = 3.14159265;
    localparam m_electron = 9.1e-31;        // mass of electron [kg]
    localparam eps_0    = 8.854e-12;


    // fitting parameter
    parameter real L = 20;                // witching layer thickness [nm]
//    parameter real F = 40e-9;
//    parameter real t_in = 20e-9;
//    parameter real t_ac = 10e-9;
    parameter real rho_ac = 2e-8;
    //parameter real rho_iso = 2e-8;
    parameter real rho_ion = 1e-2;
//    parameter real rho_in = 1.06e-7;        
    parameter real rho_m_Me = 8.95e6;        // mass density[g/m3]
    parameter real M_Me = 1.06e-22;        // Cu atomic mass [g]
    parameter real atomic_radius = 0.14;
    parameter real z = 2;                    // charge transfer number[unitless]
    parameter real r_ac = 2e-9;            // radius of active electrode [m]
    parameter real r_fil = 2e-9;            // radius of filamnt[m]
    parameter real r_ion = 2e-9;            // radius of ionic region[m]
    parameter real alpha = 0.5;            // transfer co-efficient
    parameter real m_r = 0.86;            // relation mass
    parameter real temp = 300;            // teperature [K]
    parameter real R_l = 0;            // Load resistance [Ohm][Rl=0; using current compliance]
    parameter real ic = 0.01e+00;
    parameter real j0 = 1e-2;
    parameter real phi_0 = 3.6;            // [depending on number of layers] [eV]

    // AUxiliary variable
    real VT = kb*temp/e;
//    real A_el = pow(F, 2);
    real A_fil = pi*pow(r_fil, 2);        // [m2]
//    real A_iso = pi*pow(r_ion, 2);
    real A_ac = pi*pow(r_ac, 2);            // [m2]
    real A_ion = pi*pow(r_ion, 2);
    real R_fil = rho_ac/A_fil*1e-9;        // resistance of filament per unit length [Ohm/m2]
    real R_el = 76e-3; // rho_ac*t_ac/A_el + rho_in*t_in/A_el;        // Electrode resistance(from area,thickness) [Ohm]
    real io_fil = j0*A_fil;
    real io_ac = j0*A_ac;
    real Eb = e*phi_0;
    real m_eff = m_r*m_electron;            // effective mass [kg]
    real K1 = e*A_fil/(2*pi*h)*1e18;
    real K2 = 4*pi*sqrt(2*m_eff)/h*1e-9;
    real contact_mode = 0;
    real Kdep = M_Me/(e*z*rho_m_Me)*1e9;
    real ic1;

    // State variable - defining the length of the gap between the filament and the active electrode
    real gap = L;
    
    analog
        begin
        
            // Ionic Current
            // Butler-Volmer equation of the active elctrode insulator interface
            if (V(te,be)<0)
                I(te, ion) <+ io_ac*(-exp(-alpha*z*V(te,ion)/VT));            // For Reset
            else
                I(te, ion) <+ io_ac*(limexp((1-alpha)*z*V(te,ion)/VT));            // For Set

            
            //ion
            I(ion, fil) <+ V(ion, fil)/rho_ion*gap/A_ion;

            // Butler-Volmer equation of insulator/fillament interface
            if (V(te,be)<0)
                I(fil,filAtu) <+ io_fil*(-exp((1-alpha)*z*(V(fil,filAtu))/VT));        // For Reset
            else
                I(fil,filAtu) <+ io_fil*(limexp(-alpha*z*(V(fil,filAtu))/VT));            // For Set

            // Tunneling Current, Simmons tunneling model
            I(te,filAtu) <+ ((K1/(gap*gap))*(Eb-(e*V(te,filAtu)/2))*exp(-K2*(gap)*sqrt(Eb-(e*V(te,filAtu)/2)))) - (K1*(Eb+(e*V(te,filAtu)/2))*exp(-K2*sqrt(Eb+(e*V(te,filAtu)/2))));
            V(filAtu,be) <+ (R_fil*(L-gap)+R_el+R_l)*I(filAtu,be);
            
            // ODE solving
            if(contact_mode == 0)
                begin
                    if (((gap<atomic_radius) & (I(fil,filAtu)>0)) )

                        begin

                            //Warning! Entering contact mode. The model is not valid anymore.

                            ic1 = 0;

                            contact_mode=1;

                        end
                    else if ((gap>L-atomic_radius) & (I(fil,filAtu)<0))

                        begin

                            ic1 = 0;

                        end
                    else
                        begin
                        ic1 = Kdep*I(fil,filAtu);
                        end
                    end
            else
                begin
                    $monitor("WARNING: Contact Mode, left boundary conditions of the model, no reset possible anymore");
                    ic1 = 0;
                end
            // Calculaton of the state variable gap, that is, gap b/w the filament and top electrode
            gap = L- idt(ic1, ic);
            
            V(n_fil, gnd) <+ V(fil, filAtu);
            V(n_ac, gnd) <+ V(te, ion);
            V(track_gap, gnd) <+ gap;
    end
endmodule

Please share the Spectre netlist which instantiates the VerilogA models and has the analysis statements, etc. This would give something to reproduce (rather than me trying to guess how you've got it set up or analysing the code for potential convergence issues).

Andrew