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error of laplace_zp in verilogA

sjwprcker

Hi,

I have created the following module

-------------------------------------------------------------------------

module H_ZP(IN, OUT);
input IN;
output OUT;
voltage IN, OUT;

parameter real gm1 = 5.05e-6;
parameter real RL1 = 190.0e6;
parameter real Cp1= 20.0e-15;
parameter real Cp2= 80.0e-15;
parameter real C= 5.0e-12;
parameter real R1= 4.0e6;
parameter real R2= 160.0e6;
parameter real gm2= 32.0e-6;
parameter real RL2=2.38e6;
parameter real Cc=1.0e-12;

real wz1 = -1/(R1*C);
real wz2 = -1/(R2*C);
real wz3 = gm2/Cc;
real wp1 = -1/(RL1*gm2*RL2*Cc);
real wp2 = -1/(2*R2*C);
real wp3 = -2/(R1*C);
real wp4 = -gm2/(Cp1+Cp2);
real wp5 = -6.2e-6/80.0e-15;

real ZERO [5:0] = {wz1, 0, wz2, 0, wz3, 0};
real POLE [9:0] = {wp1, 0, wp2, 0, wp3, 0, wp4, 0, wp5, 0};

analog begin
V(OUT) <+ gm1*RL1*gm2*RL2*laplace_zp( V(IN), ZERO, POLE);
end

endmodule

--------------------------------------------------------------

I run AC simulation to check the frequency response. However the error info is

"Fatal error found by spectre during DC analysis `dcOp'.
FATAL (ASL-4601): "xxx: Laplace filter is missing conjugate zero (0 + j*-3.2e+07). Correct the problem and try again.
"

In the transfer function, all the zeros (poles) are only real number. The imag parts are all 0. 

Is there any clue for this error?

Thanks. 

  • The LRM (and our Verilog-A documentation too) is a big vague on this, but the issue is that the orders of your vectors are back to front. The assumption of real then imaginary pairs is that the vector is indexed in increasing order. If you use:

    real ZERO [0:5] = {wz1, 0, wz2, 0, wz3, 0};
    real POLE [0:9] = {wp1, 0, wp2, 0, wp3, 0, wp4, 0, wp5, 0};

    it will work. What was happening was that the 0th element of the vector was 0, and the 1st element was non-zero, and hence you had all the real values as 0, and only specified the imaginary values of the zeros and poles.

    Regards,

    Andrew

  • in reply to Andrew Beckett

    Very cool and fast answer, which perfectly solve the issue. 

    Thanks a lot, Andrew!

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