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How to make sure the subcircuit is defined?

XL202506254545

Hi,

I run the spectre simulation and get the error like this:

Error found by spectre in `invx1_u', during circuit read-in.

ERROR (SFE-23): "input.scs" 25: The instance `xMNI1' is referencing an undefined model or subcircuit, `nmos1p8v'. Either include the file containing the definition of `onmos1p8v', or define `onmos1p8v' before running the simulation.
ERROR (SFE-23): "input.scs" 29: The instance `xMPI1' is referencing an undefined model or subcircuit, `pmos1p8v'. Either include the file containing the definition of `pmos1p8v, or define `pmos1p8v' before running the simulation.

I check the model library and a file named "mos_and_para.scs" is included. The content of this file is like :

section typ
include "u0.splib" section=typ_mos_and_para_process_params
endsection typ

And I see the definition of nmos1p8v and pmos1p8v in the u0.splib file, "inline subckt pmos1p8v (d g s b)" with the parameters. 

I'm confused if these subcircuits are actually defined? Thanks in advance.

  • Hi,

    Have you checked whether you are including the right section (typ) in your Model Library Setup? Just including the right model file may not be enough.

    You can also double check your simulation netlist under Netlist -> Display. You should see the model files with their sections being included. They are links which you can navigate and trace down to the subcircuit definition and model instantiation.

    The suggestions above assume your model files are correct. But you can also check if below the inline subckt ... and before the subsequent ends ..., you have a model ... statement.

    Kindly let me know if that helps.

    Regards,

    Alonso

  • in reply to Alonso Schmidt

    Hi Alonso,

    Thank you for your reply. 

    I check the model library setup and I set typ for the section. 

    For the netlist input, I find the subcircuit definition like this:

    // Library name: xxx
    // Cell name: invx2_u
    // View name: schematic
    subckt invx2_u Q A VDD VDDS VSS VSSS
    xMPI2 (Q A VDD VDDS) pmos1p8v (data.....)
    xMPI1 (Q A VDD VDDS) pmos1p8v (data.....)
    xDcon0 (VSSS VDDS) dnwcon
    xMNI2 (Q A VSS VSSS) nmos1p8v (data.....)
    xMNI1 (Q A VSS VSSS) nmos1p8v (data.....)
    ends invx2_u
    // End of subcircuit definition.

    In the u0.splib file, below the inline subckt ... and before the subsequent ends ..., there is a model ... statement but model name is a little bit different from pmos1p8v. Could this be the reason?

  • in reply to XL202506254545

    I would suggest logging a support case (after logging in, use Case->Submit). That way we can look at this together with you. Clearly some file must be missing, but it's hard to see that without knowing the specific PDK/model setup you're using, or precisely what you've done.

    Andrew

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