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Any analogue or mixed signal Cadence FinFet layouts to share?

I wondered and I think I can ask this since the Cadence Generic (cds_ff_mpt 1.1) PDK has no NDA if there were any examples of analogue layouts say for current mirrors or opamps ect that could be shared?

This could be an image of the layout but better still an actual cadence schematic and layout that I could stream in.

I know there are some simple example digital gates available in Library cds_ff_mpt_scl which are a great starting point.

Feel free to message me if it cannot be attached here.

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