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  3. schViewToView symbol creation from systemverilog not wo...

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schViewToView symbol creation from systemverilog not working

SimhanAnalog
SimhanAnalog 8 hours ago

I have a systemverilog view and want to create/update symbol in command line. I run the below command
schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")

It generates a popup that says replace/modify and cancel. If I click modify sometimes it doesnt modify the symbol.

In that case when I rerun schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen") and again select modify in the popup it modifies correctly.
Virtuoso version says it is IC 23.1

Even replace has the same behaviour. I need to run it twice for the symbol to get updated.

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  • SimhanAnalog
    SimhanAnalog 7 hours ago

    More debug. I call the schViewToView inside a form like below.

    I edit the systemverilog file using external editor and then call update_rb_symbol_core() and select modify and again modify. Sometimes symrun1 returns nil and symbol is not updated.

    procedure( update_rb_symbol_core()

    rb_symbol_flag = isFile(strcat(lib_path "/" module_name "/symbol/symbol.oa"))
    if(rb_symbol_flag
    then
    hiDisplayAppDBox(
    ?name gensym('rb_symbol_exist_message)
    ?dboxBanner "RB Symbol Message"
    ?dboxText "Symbol Exists. Choose one of the options below"
    ?callback '("rb_sym_cb(1)" "rb_sym_cb(2)" "rb_sym_cb(3)")
    ?dialogType hicQuestionDialog
    ?dialogStyle 'modal
    ?buttonLayout 'UserDefined
    ?buttons '("Replace" "Modify" "Cancel")
    ;?dontPopdowns g_dontPopdowns
    ?defaultButton 3
    )
    else
    abCreateSymbolFromPortOrder(
    ?libName lib_name_d ?cellName module_name ?viewName "systemVerilog"
    )
    )
    )

    procedure( rb_sym_cb(mode)
    case(mode
    ( 1
    abCreateSymbolFromPortOrder(
    ?libName lib_name_d ?cellName module_name ?viewName "systemVerilog"
    )
    )
    ( 2
    symrun1 = schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")
    )
    )

    )




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  • SimhanAnalog
    SimhanAnalog 7 hours ago in reply to SimhanAnalog

    For more background this is an extension of Port order in symbol view and systemverilog view - Custom IC Design - Cadence Technology Forums - Cadence Community

    If I modify rb_sym_cb procedure by adding 2 lines of schViewToView like below then it always seem to work. Even if symrun1 is nil at times, symrun2 is always t(true)

    procedure( rb_sym_cb(mode)
    case(mode
    ( 1
    abCreateSymbolFromPortOrder(
    ?libName lib_name_d ?cellName module_name ?viewName "systemVerilog"
    )
    )
    ( 2
    symrun1 = schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")
    symrun2 = schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")
    )
    )

    )



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  • Andrew Beckett
    Andrew Beckett 7 hours ago in reply to SimhanAnalog

    Please contact customer support about this. Intermittent problems like this are rather hard to diagnose (especially in the forums). I couldn't find any reports of such an issue.

    Andrew

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  • SimhanAnalog
    SimhanAnalog 6 hours ago in reply to Andrew Beckett

    I was able to simplify the issue and recreate it always.
    Say I have the following variables and procedures

    lib_name_d = "SOME_LIB"
    module_name = "sv_sym_test"

    procedure( update_symbol_core()

    hiDisplayAppDBox(
    ?name gensym('rb_symbol_exist_message)
    ?dboxBanner "RB Symbol Message"
    ?dboxText "Symbol Exists. Choose one of the options below"
    ?callback '("rb_sym_cb(1)" "rb_sym_cb(2)")
    ?dialogType hicQuestionDialog
    ?dialogStyle 'modal
    ?buttonLayout 'UserDefined
    ?buttons '("Modify" "Cancel")
    ;?dontPopdowns g_dontPopdowns
    ?defaultButton 2
    )

    )

    procedure( rb_sym_cb(mode)
    case(mode
    ( 1
    if(!schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")
    schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")

    )
    )
    )

    )


    I open cds/SOME_LIB/sv_sym_test/systemVerilog/verilog.sv file outside virtuoso in some external editor and edit some ports and save it.

    Case 1:
    In virtuoso window if I run below command 

    schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")

    and select modify then symbol gets updated correctly.

    Case 2:
    In virtuoso window if I run the below command
    update_symbol_core() and select modify and again select modify in the new popup it doesnt update symbol.
    Now if I run update_symbol_core()->modify->modify any number of times the symbol doesnt get updated.
    Now if I run schViewToView once still symbol is not updated. But after that if I run update_symbol_core() or schViewToView symbol is updated.

    Hope this helps in identifying and fixing the issue


    verilog file that I used


    module sv_sym_test (
    output o_a,
    output o_d,
    input i_arst
    );

    endmodule

     

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  • SimhanAnalog
    SimhanAnalog 5 hours ago in reply to SimhanAnalog

    Basically if I invoke the same schViewToView via the form it doesn't work. While directly calling schViewToView works. Do you see a problem with the procedures and form?

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  • SimhanAnalog
    SimhanAnalog 5 hours ago in reply to SimhanAnalog

    Basically if I invoke the same schViewToView via the form it doesn't work. While directly calling schViewToView works. Do you see a problem with the procedures and form?

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  • SimhanAnalog
    SimhanAnalog 5 hours ago in reply to SimhanAnalog

    And as a temporary fix if I change one procedure to invoke the schViewToView twice like below(if 1st one returns nil) it seems to always work

    procedure( rb_sym_cb(mode)
    case(mode
    ( 1
    if(!schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")
    schViewToView(lib_name_d module_name lib_name_d module_name "systemVerilog" "symbol" "_vmsSVVmsToPinList" "schPinListToSymbolGen")

    )
    )
    )

    )

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  • Andrew Beckett
    Andrew Beckett 53 minutes ago in reply to SimhanAnalog
    SimhanAnalog said:
    Do you see a problem with the procedures and form?

    Please see this reponse earlier - that's my advice.

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  • SimhanAnalog
    SimhanAnalog 20 minutes ago in reply to Andrew Beckett

    Thanks. I have raised a ticket already and going ahead with my workaround. Even for the ticket they will require this simplified example. Was just checking if you could spot any obvious mistake in the procedures of the simplified example. 

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