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Methodology for Sweeping Vth (delvto) or Defining Sigma Corners for DAC Mismatch Analysis?

VP202511202051

Hi everyone,

I am currently performing Corner Case and Monte Carlo analysis for a DAC design using the Tower Semiconductor 65nm (tps65rf) PDK, and I need to verify the sensitivity of my INL/DNL specifically to Threshold Voltage (Vth) variations.

Since the MOS devices in this library are implemented as subcircuits (including SOA and aging assertions), I am unable to directly sweep the standard 'vth0' model parameter from ADE.

Could anyone clarify the recommended methodology for this library?

  1. Does the PDK expose specific instance parameters (e.g., 'delvto', 'dvt', or 'mismatch_shift') that can be varied for sweeping Vth deterministically?

  2. If not, is the standard practice to use a voltage source wrapper at the gate, or is there a specific 'altergroup' syntax required to override the internal core model?

  3. Additionally, if the goal is to avoid running thousands of full Monte Carlo iterations, is there a way to perform a deterministic 3-Sigma Vth corner simulation?

Has anyone already encountered a similar requirement? If so, could you share how you managed this within the TPS65EF library or any references to existing solutions in the community?

Any insights or examples on how to set up the simulation for Vth variations using Monte Carlo or corner case analysis techniques would be highly appreciated.

Thanks in advance!

  • VP202511202051

    Hi everyone,

    I am currently performing Corner Case and Monte Carlo analysis for a DAC design using the Tower Semiconductor 65nm (tps65rf) PDK, and I need to verify the sensitivity of my INL/DNL specifically to Threshold Voltage (Vth) variations.

    Since the MOS devices in this library are implemented as subcircuits (including SOA and aging assertions), I am unable to directly sweep the standard 'vth0' model parameter from ADE.

    Could anyone clarify the recommended methodology for this library?

    1. Does the PDK expose specific instance parameters (e.g., 'delvto', 'dvt', or 'mismatch_shift') that can be varied for sweeping Vth deterministically?

    2. If not, is the standard practice to use a voltage source wrapper at the gate, or is there a specific 'altergroup' syntax required to override the internal core model?

    3. Additionally, if the goal is to avoid running thousands of full Monte Carlo iterations, is there a way to perform a deterministic 3-Sigma Vth corner simulation?

    Has anyone already encountered a similar requirement? If so, could you share how you managed this within the TPS65EF library or any references to existing solutions in the community?

    Any insights or examples on how to set up the simulation for Vth variations using Monte Carlo or corner case analysis techniques would be highly appreciated.

    Thanks in advance!

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