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MIMcap is being not recognised by Calibre nmLVS in tsmc65nm technology

SC20260124443 6 months ago

I am facing an LVS issue with Calibre nmLVS in TSMC 65nm technology where a MIM capacitor is not being recognized correctly. In the schematic, the MIM capacitor is instantiated once, and in the layout it is also placed once using the corresponding PDK, but during LVS Calibre reports a mismatch showing in the layout.

Saloni Chhabra 6 months ago

Calibre is not a Cadence tool. Please send this question to Siemens EDA - either to their support or one of their community forums.

Saloni
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