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Custom IC Design

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  • Discussion

    Corner Simulation

    Category: Custom IC Design

    By YonYon

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    updated over 12 years ago by Andrew Beckett

    1 replies • 15284 views
  • Discussion

    Assura DRC - round edges with geomSize() operation

    Category: Custom IC Design

    By PekkaH

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    updated over 12 years ago by Andrew Beckett

    1 replies • 972 views
  • Discussion

    Changing instance model by alter statement

    Category: Custom IC Design

    By ChrisEAS

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    updated over 12 years ago by Andrew Beckett

    3 replies • 14903 views
  • Discussion

    Regarding Transient analysis of Gate Charge

    Category: Custom IC Design

    By kapiljainwal

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    updated over 12 years ago by kapiljainwal

    2 replies • 14428 views
  • Discussion

    How to plot device parameters from transient sims.

    Category: Custom IC Design

    By archive

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    updated over 12 years ago by Andrew Beckett

    6 replies • 18873 views
  • Discussion

    Mixed Signal Simulation Question

    Category: Custom IC Design

    By brianzimmer

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    updated over 12 years ago by Andrew Beckett

    3 replies • 14471 views
  • Discussion

    OSS netlister: how to avoid netlisting of parameter "m"

    Category: Custom IC Design

    By Andreasm

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    started over 12 years ago

    0 replies • 816 views
  • Discussion

    verilog netlist to schematic

    Category: Custom IC Design

    By Myskill

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    updated over 12 years ago by Andrew Beckett

    3 replies • 15868 views
  • Discussion

    Manipulating a single Instance Iterations in Virtuoso

    Category: Custom IC Design

    By Battosai

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    updated over 12 years ago by Battosai

    5 replies • 19208 views
  • Discussion

    soi transistor

    Category: Custom IC Design

    By arundevnkumar

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    updated over 12 years ago by Andrew Beckett

    3 replies • 14651 views
  • Discussion

    Symbol with design variable

    Category: Custom IC Design

    By HamidKhatibi

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    updated over 12 years ago by HamidKhatibi

    2 replies • 17533 views
  • Discussion

    Monte Carlo Simulations - Mismatch Analysis

    Category: Custom IC Design

    By AVen12

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    updated over 12 years ago by AVen12

    2 replies • 2430 views
  • Discussion

    variable to allow small unit on non-process layer path?

    Category: Custom IC Design

    By linbo

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    updated over 12 years ago by Andrew Beckett

    1 replies • 13766 views
  • Discussion

    How to use vcvs as an OR or AND gate

    Category: Custom IC Design

    By sohaiba

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    updated over 12 years ago by Andrew Beckett

    3 replies • 22193 views
  • Discussion

    Spectre MDL newbie. How to use acnames/actimes with spectre mdl?

    Category: Custom IC Design

    By Saurabh Singh

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    •

    updated over 12 years ago by Andrew Beckett

    1 replies • 2969 views
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