Custom IC Design

Latest Posts

Discussion

Creating a variable capacitor

Category: Custom IC Design

By MaryamHo

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 6067 views
Discussion

Very low DC gain of pstb simulation

Category: Custom IC Design

By NeoTED

$usertype
•
updated over 2 years ago by ShawnLogan

3 replies • 7137 views
Discussion

Save specified output option in ADE XL transient simulations not working

Category: Custom IC Design

By LMendolia

$usertype
•
updated over 2 years ago by LMendolia

4 replies • 8234 views
Discussion

How run mismatch simulation in different corners?

Category: Custom IC Design

By zuiying

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 6188 views
Discussion

*Error* abs: can't handle abs Monte carlo Simulation

Category: Custom IC Design

By zinal7

$usertype
•
started over 2 years ago

0 replies • 896 views
Discussion

Simulating the sic mosfet model using spectre

Category: Custom IC Design

By liangqunshan

$usertype
•
started over 2 years ago

0 replies • 5781 views
Discussion

Sweep design variable inside Monte Carlo run

Category: Custom IC Design

By Analog Pete

$usertype
•
updated over 2 years ago by Analog Pete

3 replies • 6989 views
Discussion

Save current values with a specific time step in Cadence Spectre (SPICE)

Category: Custom IC Design

By NKFET

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 5863 views
Discussion

Where are maestro expressions stored? - Trying to recover expressions after a crash.

Category: Custom IC Design

By ilyaF

$usertype
•
updated over 2 years ago by Andrew Beckett

1 replies • 1219 views
Discussion

verilog-a syntax to read a 64-bit binary value from a file

Category: Custom IC Design

By MikeVP

$usertype
•
updated over 2 years ago by MikeVP

2 replies • 7075 views
Discussion

How to run a Monte Carlo simulation while scanning the temperature?

Category: Custom IC Design

By zuiying

$usertype
•
updated over 2 years ago by zuiying

2 replies • 6820 views
Discussion

MAESTRO: Print -> DC operating point gives out different operating points for different MOSFETs in the design

Category: Custom IC Design

By akaraguppi

$usertype
•
updated over 2 years ago by akaraguppi

4 replies • 2982 views
Discussion

Setting xSnapSpacing and ySnapSpacing in .cdsenv not taking effect

Category: Custom IC Design

By dr3patel

$usertype
•
updated over 2 years ago by dr3patel

4 replies • 6768 views
Discussion

How to do parametric analysis in maestro

Category: Custom IC Design

By designPMT

$usertype
•
updated over 2 years ago by ShawnLogan

1 replies • 7319 views
Discussion

How to set in ADE the width of the Spectre netlist file?

Category: Custom IC Design

By StephanWeber

$usertype
•
updated over 2 years ago by Andrew Beckett

7 replies • 7683 views

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.