• Skip to main content
  • Skip to search
  • Skip to footer
Cadence Home
  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

  1. Community Forums
  2. Custom IC Design
CDNS - double leaderboard script

Custom IC Design

  • This search text may be transcribed, used, stored, or accessed by our third-party service providers per our Cookie Policy and Privacy Policy.

Latest Posts

  • Create a new Post
  • Discussion

    Hierarchical Design Flow

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12582 views
  • Discussion

    SOC Encounter ICFB Mismatch

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12530 views
  • Discussion

    Turn off the noise of a single Tansistor

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    2 replies • 13845 views
  • Discussion

    LVS + no connect pin

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 15720 views
  • Discussion

    divider spurs

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12856 views
  • Discussion

    Net_nwell net_welltap DRC error

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    2 replies • 14922 views
  • Discussion

    Addition of source with know statistical data

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    4 replies • 15539 views
  • Discussion

    spectre save statement wildcards

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    2 replies • 14329 views
  • Discussion

    no info files in spectreS

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 12907 views
  • Discussion

    "simulation data not available" problem

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    4 replies • 10451 views
  • Discussion

    Cadence virtuoso symbol including schematic

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 13068 views
  • Discussion

    Diva errors.

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    6 replies • 15154 views
  • Discussion

    Using a PSpice advanced part into a subcircuit

    Category: Custom IC Design

    By archive archive

    •

    started over 17 years ago

    0 replies • 12523 views
  • Discussion

    Resistor label/pin problem

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    1 replies • 2580 views
  • Discussion

    Drawing circles in Virtuoso

    Category: Custom IC Design

    By archive archive

    •

    updated over 17 years ago by archive

    5 replies • 17287 views
<>

Community Guidelines

The Cadence Design Communities support Cadence users and technologists interacting to exchange ideas, news, technical information, and best practices to solve problems and get the most from Cadence technology. The community is open to everyone, and to provide the most value, we require participants to follow our Community Guidelines that facilitate a quality exchange of ideas and information. By accessing, contributing, using or downloading any materials from the site, you agree to be bound by the full Community Guidelines.

© 2025 Cadence Design Systems, Inc. All Rights Reserved.

  • Terms of Use
  • Privacy
  • Cookie Policy
  • US Trademarks
  • Do Not Sell or Share My Personal Information