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Custom IC Design

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  • Discussion

    abstract generator - are there absSetBinOption function descriptions available ?

    Category: Custom IC Design

    By drosi drosi

    •

    started over 1 year ago

    0 replies • 408 views
  • Discussion

    Saving Internal Junction Temperature of VBIC Bipolar Transistor Model

    Category: Custom IC Design

    By sgcad sgcad

    •

    updated over 1 year ago by sgcad

    5 replies • 5316 views
  • Discussion

    How can I take a real value and assign it to a node in this case the output port of my module

    Category: Custom IC Design

    By Wasif Absar Wasif Absar

    •

    updated over 1 year ago by Wasif Absar

    2 replies • 4109 views
  • Discussion

    ADC Verification Workshop link is showing as retired,can I get this content, please

    Category: Custom IC Design

    By RanjithD RanjithD

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 1360 views
  • Discussion

    AOP Netlisting failed because of errors in callback

    Category: Custom IC Design

    By Monarch03116 Monarch03116

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 3787 views
  • Discussion

    How to get an I-V curve like this?

    Category: Custom IC Design

    By Doronzzz Doronzzz

    •

    updated over 1 year ago by Frank Wiedmann

    5 replies • 4708 views
  • Discussion

    Run multiple same type analysis in IC 23.1 ADE

    Category: Custom IC Design

    By SimbaG SimbaG

    •

    updated over 1 year ago by Andrew Beckett

    5 replies • 5728 views
  • Discussion

    Spectre X Transient Simulation Discrepancy vs. Spectre APS

    Category: Custom IC Design

    By jacob.sillman jacob.sillman

    •

    updated over 1 year ago by jacob.sillman

    4 replies • 5428 views
  • Discussion

    Source setlist references but does not define...

    Category: Custom IC Design

    By gsciller gsciller

    •

    updated over 1 year ago by gsciller

    2 replies • 4228 views
  • Discussion

    Using _ansCdlSubcktCall to netlist but inherited sub pin not netlisting

    Category: Custom IC Design

    By rglenf rglenf

    •

    updated over 1 year ago by rglenf

    2 replies • 1029 views
  • Discussion

    setting "max_approach_step" parameter

    Category: Custom IC Design

    By anwx anwx

    •

    updated over 1 year ago by anwx

    3 replies • 3962 views
  • Discussion

    Copied layout always refers to the old physConfig

    Category: Custom IC Design

    By RuihW RuihW

    •

    updated over 1 year ago by Andrew Beckett

    1 replies • 4268 views
  • Discussion

    Reuse DC solution from a specific corner in one test in the same corner of a different test

    Category: Custom IC Design

    By Analog Pete Analog Pete

    •

    updated over 1 year ago by Analog Pete

    7 replies • 5699 views
  • Discussion

    Analysis (stb): phase plots shows reversal i.e. phase plot starting from 0 degree

    Category: Custom IC Design

    By BitanMallik BitanMallik

    •

    updated over 1 year ago by Frank Wiedmann

    1 replies • 4321 views
  • Discussion

    load skill file without starting Virtuoso but use Virtuoso API.

    Category: Custom IC Design

    By Maple Oven Maple Oven

    •

    updated over 1 year ago by RobMan

    1 replies • 4120 views
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